29-09-2012, 01:19 PM
Reliable and Cost Effective Anti-collision Technique for RFID UHF Tag
Reliable and Cost Effective.pptx (Size: 111.79 KB / Downloads: 57)
Introduction
In the data management system a significant role of the Data link layer is to convert the unreliable physical link between reader and tag into a reliable link. Therefore, the RFID system employs the Cyclic Redundancy Check (CRC) as an error detection scheme
In addition for reader to communicate with the multiple tags, an anti-collision technique is required. The technique is to coordinate the communication between the reader and the tags. The common deterministic anti-collision techniques are based on the Tree algorithm such as the Binary Tree and the Query Tree algorithms . However this technique has longer identification time which dependents on the number of existing tag and the identification bit (ID) length
Methodology
In our proposed RCEAT the frame consists of slots and each slot (column) is divided into four minislots (rows). Therefore in each slot, four tags are allowed for contending the minislots. The uniqueness of this proposed technique is reducing the tag identification time in the Binary Tree
This proposed technique does not require the tag to remember the instructions from the reader during the identification process. Thus the tag is treated as an address carrying device only and memory-less tag can be designed which requires very low power.
Pre RCEAT
In the PreRCEAT, the received messages are fed into the CRC-remover module.
These received messages will be separated into two; the received packet and the received CRC. These packet and CRC are sent to the CRCchecker module for verification process. The CRCchecker module recalculated the CRC of the received packet. Then, this calculated CRC is compared with the received CRC. If the values are same, means no error, the status-bit is set to its original value i.e. zero Otherwise or there are errors in the packet, the status-bit is set to one.
PostRCEAT
In the PostRCEAT, the active tags are divided into a group of four for every Read cycle in order to reduce the number of iterations in the identification process. The PostRCEAT reads all the ID bits at once regardless of its length. This is performed by using the word-by word multiplexing. During the identification process, the Fast-search module identifies the four tag’s IDs simultaneously in one Read cycle. The module firstly identifies the smallest ID bits until the largest one follows the Binary Tree with a maximum number of four leaves
CONCLUSION
A proposed Reliable and Cost Effective Anti-collision technique (RCEAT) is designed to achieve a reliable and cost effective identification technique of the tag. The RCEAT architecture consists of two main subsystems; PreRCEAT checks error in the incoming packets using the CRC scheme. PostRCEAT identifies the error free packets using Binary Tree based technique. The architecture has been synthesized using Xilinx Synthesis Technology (XST), Simulated using MODELSIM.