20-09-2013, 03:52 PM
Tutorial On Introduction to 8085 Architecture and Programming
Introduction to 8085 .pdf (Size: 173.68 KB / Downloads: 58)
Control Unit
Generates signals within uP to carry out the instruction, which has been decoded. In
reality causes certain connections between blocks of the uP to be opened or closed, so
that data goes where it is required, and so that ALU operations occur.
Arithmetic Logic Unit
The ALU performs the actual numerical and logic operation such as ‘add’, ‘subtract’,
‘AND’, ‘OR’, etc. Uses data from memory and from Accumulator to perform
arithmetic. Always stores result of operation in Accumulator.
Registers
The 8085/8080A-programming model includes six registers, one accumulator, and
one flag register, as shown in Figure. In addition, it has two 16-bit registers: the stack
pointer and the program counter. They are described briefly as follows.
The 8085/8080A has six general-purpose registers to store 8-bit data; these are
identified as B,C,D,E,H, and L as shown in the figure. They can be combined as
register pairs - BC, DE, and HL - to perform some 16-bit operations. The
programmer can use these registers to store or copy data into the registers by using
data copy instructions.
Accumulator
The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU). This
register is used to store 8-bit data and to perform arithmetic and logical operations.
The result of an operation is stored in the accumulator. The accumulator is also
identified as register A.
Flags
The ALU includes five flip-flops, which are set or reset after an operation according
to data conditions of the result in the accumulator and other registers. They are called
Zero(Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags; they are
listed in the Table and their bit positions in the flag register are shown in the Figure
below. The most commonly used flags are Zero, Carry, and Sign. The microprocessor
uses these flags to test data conditions.
For example, after an addition of two numbers, if the sum in the accumulator id larger
than eight bits, the flip-flop uses to indicate a carry -- called the Carry flag (CY) -- is
set to one. When an arithmetic operation results in zero, the flip-flop called the
Zero(Z) flag is set to one. The first Figure shows an 8-bit register, called the flag
register, adjacent to the accumulator. However, it is not used as a register; five bit
positions out of eight are used to store the outputs of the five flip-flops. The flags are
stored in the 8-bit register so that the programmer can examine these flags (data
conditions) by accessing the register through an instruction.
8085 System Bus
Typical system uses a number of busses, collection of wires, which transmit binary
numbers, one bit per wire. A typical microprocessor communicates with memory and
other devices (input and output) using three busses: Address Bus, Data Bus and
Control Bus.
Address Bus
One wire for each bit, therefore 16 bits = 16 wires. Binary number carried alerts
memory to ‘open’ the designated box. Data (binary) can then be put in or taken
out.The Address Bus consists of 16 wires, therefore 16 bits. Its "width" is 16 bits. A
16 bit binary number allows 216 different numbers, or 32000 different numbers, ie
0000000000000000 up to 1111111111111111. Because memory consists of boxes,
each with a unique address, the size of the address bus determines the size of memory,
which can be used. To communicate with memory the microprocessor sends an
address on the address bus, eg 0000000000000011 (3 in decimal), to the memory. The
memory the selects box number 3 for reading or writing data. Address bus is
unidirectional, ie numbers only sent from microprocessor to memory, not other way.
8085 Functional Description
The 8085A is a complete 8 bit parallel central processor. It requires a single +5 volt
supply. Its basic clock speed is 3 MHz thus improving on the present 8080's
performance with higher system speed. Also it is designed to fit into a minimum
system of three IC's: The CPU, a RAM/ IO, and a ROM or PROM/IO chip.
The 8085A uses a multiplexed Data Bus. The address is split between the higher 8bit
Address Bus and the lower 8bit Address/Data Bus. During the first cycle the address
is sent out. The lower 8bits are latched into the peripherals by the Address Latch
Enable (ALE). During the rest of the machine cycle the Data Bus is used for memory
or l/O data.
The 8085A provides RD, WR, and lO/Memory signals for bus control. An Interrupt
Acknowledge signal (INTA) is also provided. Hold, Ready, and all Interrupts are
synchronized. The 8085A also provides serial input data (SID) and serial output data
(SOD) lines for simple serial interface.
In addition to these features, the 8085A has three maskable, restart interrupts and one
non-maskable trap interrupt. The 8085A provides RD, WR and IO/M signals for Bus
control.
Basic System Timing
The 8085A has a multiplexed Data Bus. ALE is used as a strobe to sample the lower
8bits of address on the Data Bus. Figure 2 shows an instruction fetch, memory read
and l/ O write cycle (OUT). Note that during the l/O write and read cycle that the l/O
port address is copied on both the upper and lower half of the address. As in the 8080,
the READY line is used to extend the read and write pulse lengths so that the 8085A
can be used with slow memory. Hold causes the CPU to relingkuish the bus when it is
through with it by floating the Address and Data Buses.