08-01-2013, 01:22 PM
UART – Universal Asynchronus Reciever Transmitter
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Introduction
Although it has a big name, this module of AVR is one of the easiest to use. UART is a protocol which has been standardized and commonly used by many devices. It is so popular, that even the serial port behind out computer CPUs uses this protocol to communicate with other devices.
UART is a serial protocol, which means that it transmits data, one bit at a time. So, we need only on conductor to transmit data.
It is a very use full practice of developers to use the UART as a debugging tool.
When a connectivity between the PC and microcontroller is established, data could be obtained from PC or Displayed on the Monitor. Computers using Windows have a utility called has Hyper Terminal in their Start Menu > Programs > Accessories > Communications > Hyper Terminal.
Linux users can use same type of utility called as GTKterm.
Note that AVR actually has a USART module (Universal Synchronous Asynchronous Receiver Transmitter). But communication with the computer requires UART protocol. Hence we focus our attention on UART.
This goes for all the features of AVR: All you need to do to start using the function is just configure the associated registers.
• Bit 6 – TXC: USART Transmit Complete
This flag bit is set when the entire frame in the Transmit Shift Register has been shifted out and there are no new data currently present in the transmit buffer (UDR). The TXC Flag bit is automatically cleared when a transmit complete interrupt is executed, or it can be cleared by writing a one to its bit location. The TXC Flag can generate a Transmit Complete interrupt.
• Bit 5 – UDRE: USART Data Register Empty
The UDRE Flag indicates if the transmit buffer (UDR) is ready to receive new data. If UDRE is one, the buffer is empty, and therefore ready to be written. The UDRE Flag can generate a Data Register Empty interrupt. UDRE is set after a reset to indicate that the Transmitter is ready.
• Bit 4 – FE: Frame Error
This bit is set if the next character in the receive buffer had a Frame Error when received (i.e., when the first stop bit of the next character in the receive buffer is zero). This bit is valid until the receive buffer (UDR) is read. The FE bit is zero when the stop bit of received data is one. Always set this bit to zero when writing to UCSRA.
• Bit 3 – DOR: Data OverRun
This bit is set if a Data OverRun condition is detected. A Data OverRun occurs when the receive buffer is full (two characters), it is a new character waiting in the Receive Shift Register, and a new start bit is detected. This bit is valid until the receive buffer (UDR) is read. Always set this bit to zero when writing to UCSRA.
• Bit 2 – PE: Parity Error
This bit is set if the next character in the receive buffer had a Parity Error when received and the parity checking was enabled at that point (UPM1 = 1). This bit is valid until the receive buffer
(UDR) is read. Always set this bit to zero when writing to UCSRA.
• Bit 1 – U2X: Double the USART transmission speed
This bit only has effect for the asynchronous operation. Write this bit to zero when using synchronous operation.
• Bit 0 – MPCM: Multi-processor Communication Mode
This bit enables the Multi-processor Communication mode. When the MPCM bit is written to one, all the incoming frames received by the USART Receiver that do not contain address information will be ignored. The Transmitter is unaffected by the MPCM setting.