17-11-2012, 04:39 PM
Arithmetic Logic Unit
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Introduction
In this lab you are going to implement a complete ALU and learn how to make testbenches and gate
level simulations.
ALU description
An ALU (Arithmetic Logic Unit) is a combinatorial circuit performing arithmetic and logical operations.
It’s the central execution unit of a CPU, and its complexity can vary.
A simple ALU has two inputs for the operands, one input for a control signal that selects the operation,
and one output for the result. The following figure is the common representation of an ALU.
Add/Sub
The Add/Sub unit performs 32-bit additions and subtractions.
• Input sub activates the subtraction mode.
• Output carry is the carry out of the internal adder.
• Output zero indicates that the result is equal to 0 when it is high.
You can see the internal architecture of the Add/Sub unit in the following figure.
When the subtraction mode is activated, the second operand should become the two’s complement
of B. This conditional inversion of B can be performed with 32 XOR gates: when sub is high B is
inverted; otherwise it keeps its original value. The conditional increment in case of a subtraction mode
can be done by connecting the sub signal directly to the carry in of the adder. As a result we have
A + B + 1 which is equivalent to A