18-05-2012, 12:15 PM
VHDL, Verilog, and the Altera environment Tutorial
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This tutorial is intended to familiarize you with the Altera environment and introduce the hardware description languages VHDL and Verilog. The tutorial will step you through the implementation and simulations of a full-adder in both languages. Using this background you will implement a four-bit adder in both VHDL and Verilog. In the future, HDL labs can be done in either language.
You may want to refer to Appendix A to review the standard structures of VHDL and Verilog modules.
The user can specify any third-party tools that should be used. A commonly used term for CAD software for electronic circuits is EDA tools, where the acronym stands for Electronic Design Automation. This term is used in Quartus II messages that refer to third-party tools, which are the tools developed and marketed by companies other than Altera. Since we will rely solely on Quartus II tools, we will not choose any other tools. Press Next.
A summary of the chosen settings appears in the screen shown in Figure 8. Press Finish, which returns to the main Quartus II window, but with lab1_YOURNAME specified as the new project, in the display title bar.
Code Compilation
The code in the file fulladder is processed by several Quartus II tools that analyze the code, synthesize the circuit, and generate an implementation of it for the target chip. These tools are controlled by the application program called the Compiler.
Run the Compiler by selecting Processing > Start Compilation, or by clicking on the toolbar icon that looks like a purple triangle. As the compilation moves through various stages, its progress is reported in a window on the left side of the Quartus II display. Successful (or unsuccessful) compilation is indicated in a pop-up box.
Acknowledge it by clicking OK, which leads to the Quartus II display in Figure 12. In the message window, at the bottom of the figure, various messages are displayed. In case of errors, there will be appropriate messages given. When the compilation is finished, a compilation report is produced. A window showing this report is opened automatically, as seen in Figure 12. The window can be resized, maximized, or closed in the normal way, and it can be opened at any time either by selecting Processing > Compilation Report or by clicking on the icon