12-04-2013, 03:12 PM
VLSI Design of Spread Spectrum Image Watermarking
VLSI Design.pdf (Size: 108.13 KB / Downloads: 18)
Abstract
Spread spectrum watermarking for multimedia signal becomes
appealing due to its high robustness attribute and
is used widely for various applications. Some of these
applications demand development of low cost algorithms
so that they can be used for real time services such as
broadcast monitoring, security in communication. In recent
time one similar application of digital watermarking
becomes promising that assesses blindly the QoS (quality
of services) of the multimedia services which is expected
to be offered by the future generation mobile radio network.
However, the major shortcomings of the existing
SS watermarking schemes are high computation cost and
complexity of the algorithm that limits their use for stated
purposes. The paper proposes SS image watermarking algorithm
using Fast Walsh transform that offers low cost
and ease of hardware realization. VLSI implementation
using Field Programmable Gate Array (FPGA) has been
developed for the algorithms and circuit can be integrated
into the existing digital still camera framework.
Introduction
Spread spectrum (SS) modulation principle can be used
for watermarking in digital media as it is widely accepted
to the watermarking research community due to
its robustness attribute. SS is accomplished by spreading
a narrow band watermark into wide spectrum of the
cover so that watermark energy for each frequency bin
become less and could hardly be detectable. Several
SS watermarking schemes for multimedia signals are developed
using DCT [1], Fourier-Mellin [2], wavelet [3]
transforms. However, the techniques are not suitable for
broadcast monitoring due to the high computation cost,
complexity that makes their hardware realization complicated.
Hardware implementation of digital watermarking
techniques offer advantages of real time processing
of data [4][5]. If a chip is £tted in the digital devices,
the output video or images can be marked right at the
origin although the same can be done using software after
those videos or images downloaded to the computer.
But, in this case embedding software will take more time
compared to hardware.
Proposed algorithm
The cover image of size (Mc × Nc) is partitioned into
(8 × 8) non-overlapping blocks. Each image block is
then decomposed using Fast Walsh transform [8]. The
size of the image block is considered (8 × 8) in order to
make the scheme compatible with JPEG compression operation.
The widely used code pattern for SS modulation
technique is pseudo noise (PN) sequence and is generated
using LFSR (Linear feedback shift register)[9]. The size
of the PN sequence is identical to the size of the Walsh
coef£cient matrix. Thus a set of PN matrices denoted by
(Pi) of number (Mm.Nm) are generated. It is preferable
to use antipodal signaling scheme for data embedding in
order to increase robustness performance.
VLSI design
The VLSI architecture of the proposed algorithm is designed
using XILINX SPARTAN series FPGA. There are
two main sub blocks, one is the transmitter and the other
one is the receiver. The over all function of the transmitter
unit is to decompose the image signal using Walsh
transform and then embedding the watermark while the
receiver unit decodes the embedded watermark.
Transmitter architecture
The VLSI architecture of the transmitter for the proposed
algorithm is shown in Fig. 1. Hardware design consists of
four sub blocks or module namely (1) Walsh Transform
module, (2) Code generation module, (3) Data embedding
module and (4) Inverse Walsh transformation module.
Receiver architecture
The VLSI architecture of receiver design is shown in Fig.
3.The major sub blocks are (1) Walsh transform module
(2) Correlation calculation module (3) Mean correlation
and threshold calculation module.
Watermarked data is fed to the input pin G[15:0] of
the Walsh transform block. The output of this block is
passed through the correlation calculation block. The
function of the correlation calculation block is to calculate
the correlation between the spreading functions and
Walsh coef£cients block. Then the correlation values are
passed through a mean correlation and threshold calculation
block. At the output of the block, the message bits
are detected.
Conclusions
An algorithm for low cost SS image watermarking using
Walsh transformation is proposed in the paper and
its VLSI realization using FPGA is also reported. Algorithm
requires few simple computation and VLSI implementation
using FPGA allows it application for real time multimedia data transmission. Current work is going on to develop the dedicated digital system using this FPGA chip.