04-05-2012, 12:47 PM
Scoreboard in CDC 6600
scorebord.ppt (Size: 312.5 KB / Downloads: 32)
HW Schemes: Instruction Parallelism
Why in HW at run time?
Works when can’t know real dependence at compile time
Compiler simpler
Code for one machine runs well on another
Key idea: Allow instructions behind stall to proceed
DIVD F0,F2,F4
ADDD F10,F0,F8
SUBD F12,F8,F14
Enables out-of-order execution => out-of-order completion
ID stage checked both for structural and data hazard.
Scoreboard dates to CDC 6600 in 1963
HW Schemes: Instruction Parallelism
Out-of-order execution divides ID stage:
1. Issue—decode instructions, check for structural hazards
2. Read operands—wait until no data hazards, then read operands
Scoreboards allow instruction to execute whenever 1 & 2 hold, not waiting for prior instructions
CDC 6600: In order issue, out of order execution, out of order commit ( also called completion)
Four Stages of Scoreboard Control
Issue—decode instructions & check for structural hazards (ID1)
If a functional unit for the instruction is free and no other active instruction has the same destination register (WAW), the scoreboard issues the instruction to the functional unit and updates its internal data structure. If a structural or WAW hazard exists, then the instruction issue stalls, and no further instructions will issue until these hazards are cleared.
Read operands—wait until no data hazards, then read operands (ID2)
A source operand is available if no earlier issued active instruction is going to write it, or if the register containing the operand is being written by a currently active functional unit. When the source operands are available, the scoreboard tells the functional unit to proceed to read the operands from the registers and begin execution. The scoreboard resolves RAW hazards dynamically in this step, and instructions may be sent into execution out of order.