04-09-2014, 04:13 PM
FPGA DESIGN
[attachment=67643]
INTRODUCTION
Field Programmable Gate Array(FPGA) is an IC designed to be configured after manufacturing.
ASIC vs FPGA vs PLD’s
Glue Logic
Inexpensive, easy realization of Logic networks in Hardware.
Manufacture timing is fast
WHERE FPGA LIES?
Programmable Logic Devices
SPLD
CPLD
Application Specific Integrated Circuit
Full Custom
CBIC
Gate Arrays
FPGA lies in between both.
FPGA has certain features of PLD’s and ASIC.
FPGA ARCHITECTURE
CLB( Configurable Logic Blocks)
IOB( Input Output Blocks)
PI (Programmable Interconnections)
RAM Blocks
Dedicated Multipliers
CLB ARCHITECTURE
LUT (Look Up Table)
FF (Flip Flop)
Multiplexer
PROGRAMMING IN FPGA
SRAM Based
Anti-fuse Technology
EPROM/ EEPROM
SWITCH MATRIX
Switch Matrix connects the interconnection lines to input/output of CLB’s
It is a set of Multiplexers where incoming line is connected to any outgoing line
REAL TIME APPLICATIONS
Automotive
Image processing
Vehicle Networking and connectivity
Consumer Electronics
Digital Cameras
Set-top Boxes
Data Centre
Routers
Switches
Medical
CT-Scanner
MRI / X-ray
CODE OPTIMIZATION
Xilinx ISE --- Tool for Xilinx FPGAs.
Code Compilation steps:
.v (or) .vhd (or) .sch Design Entry
.v/.vhd/.sch .ngc file Synthesis
.ngc .ngd Translate
.ngd .ncd and .pcf mapping
Placement and Routing
Bit stream Generation
Config/Program Download the bit stream file
in FPGA
CONCLUSION
Performance
ASIC
FPGA
MP/MC
Unit Cost
ASIC
FPGA
MP/MC
Time of Manufacture
ASIC
FPGA
MP/MC
[attachment=67643]
INTRODUCTION
Field Programmable Gate Array(FPGA) is an IC designed to be configured after manufacturing.
ASIC vs FPGA vs PLD’s
Glue Logic
Inexpensive, easy realization of Logic networks in Hardware.
Manufacture timing is fast
WHERE FPGA LIES?
Programmable Logic Devices
SPLD
CPLD
Application Specific Integrated Circuit
Full Custom
CBIC
Gate Arrays
FPGA lies in between both.
FPGA has certain features of PLD’s and ASIC.
FPGA ARCHITECTURE
CLB( Configurable Logic Blocks)
IOB( Input Output Blocks)
PI (Programmable Interconnections)
RAM Blocks
Dedicated Multipliers
CLB ARCHITECTURE
LUT (Look Up Table)
FF (Flip Flop)
Multiplexer
PROGRAMMING IN FPGA
SRAM Based
Anti-fuse Technology
EPROM/ EEPROM
SWITCH MATRIX
Switch Matrix connects the interconnection lines to input/output of CLB’s
It is a set of Multiplexers where incoming line is connected to any outgoing line
REAL TIME APPLICATIONS
Automotive
Image processing
Vehicle Networking and connectivity
Consumer Electronics
Digital Cameras
Set-top Boxes
Data Centre
Routers
Switches
Medical
CT-Scanner
MRI / X-ray
CODE OPTIMIZATION
Xilinx ISE --- Tool for Xilinx FPGAs.
Code Compilation steps:
.v (or) .vhd (or) .sch Design Entry
.v/.vhd/.sch .ngc file Synthesis
.ngc .ngd Translate
.ngd .ncd and .pcf mapping
Placement and Routing
Bit stream Generation
Config/Program Download the bit stream file
in FPGA
CONCLUSION
Performance
ASIC
FPGA
MP/MC
Unit Cost
ASIC
FPGA
MP/MC
Time of Manufacture
ASIC
FPGA
MP/MC