09-06-2010, 05:27 PM
Presented By:
Bishop Brock and Karthick Rajamani
IBM Research 11501 Burnet Road Austin, Texas 78758
Abstractâ€
This paper discusses several of the SOC design issues pertaining to dynamic voltage and frequency scalable systems, and how these issues were resolved in the IBM PowerPC 405LP processor. We also introduce DPM, a novel architecture for policy-guided dynamic power management. We illustrate the utility of DPM by its ability to implement several classes of power management strategies and demonstrate practical results for a 405LP embedded system.
read full report
http://www.research.ibmarl/papers/DPM%20...C%2003.pdf
related links
http://atrak.usc.edu/~massoud/Papers/DVF...ccad06.pdf
http://www.latticesemidynamic/view_docum...nt_id=9552
http://www.scribddoc/22002138/Dynamic-Po...ded-System