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Low power and high speed multiplication design through mixed number representation


Apeksha Reddy, VI Sem, SDMCET, Dharwad
Ashroo M Das, VI Sem, SDMCET, Dharwad



Contents

INTRODUCTION
THE ALGORITHM AND ITS VLSI ARCHITECTURE
CONVERSION FROM TWO’S COMPLEMENT TO SM NOTATION
RADIX-4 BOOTH’S ALGORITHM
SPEEDING UP THE PP ACCUMULATION
CONVERTING THE RB NUMBER INTO TWO’S COMPLEMENT NUMBER
CONCLUSION
REFRENCES
ACKNOWLEDGEMENT


What is a multiplication ?
How is multiplication done?
With what speed is it done?
How much is the power consumed?
What is the accuracy of getting the exact result?