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Magnetic Random Access Memories (M-RAM) : A truly universal memory

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Introduction
Recent developments in the physics of spin electronics (see Inset) have enabled the
emergence of a new class of non-volatile memories, Magnetic Random Access Memories
(MRAM). MRAM combine on paper all the virtues of current silicon-based memories: speed,
density, non-volatility, low power consumption, radiation hardness and endurance (see Table
1). The first target for MRAM is replacement of Flash memories, such as those used in cell
phones, digital cameras, smart cards etc…, which, despite being non-volatile, have a high
power consumption, are sluggish at write and are prone to aging effects. In a longer run,
MRAM may well become a universal memory which would also be substituted for Static
RAM (SRAM) and Dynamic RAM (DRAM).


The basic MRAM cell: The Magnetic Tunnel Junction
In MRAM, the information is no longer stored by electrical charges, as in semiconductor
memories, but by two opposite directions of the magnetization vector in a small
magnetic nanostructure. The basic MRAM cell [1] is the so-called Magnetic Tunnel Junction
(MTJ) which consists of two magnetic layers sandwiching a thin (sub-nm) insulating layer
(see Fig. 1). The magnetization of one of the layers, acting as a reference layer, is fixed and
kept rigid in one given direction. The other layer, acting as the storage layer, can be switched
under an applied magnetic field from parallel to antiparallel to the reference layer, therein
inducing a change in the cell resistance of approximately 50%.


The first generation : Field-Induced Magnetic Switching (FIMS)
A fully functional MRAM memory is based on a 2D array of individual cells, which
can be addressed individually. In today’s architecture, each memory cell combines a CMOS
selection transistor with a magnetic tunnel junction and three line levels (see Fig. 2). (i) At
read, a low power current pulse in the lower line level ('control line') opens the transistor to
address the selected memory cell. The cell resistance is measured by driving a current from
the 'word line' through the MTJ (see Fig. 2a) and comparing to a reference cell located
somewhere in the array. (ii) At write, the “word lines” and “bit lines”, arranged in a crosspoint
architecture on each side of the MTJ, are energized by synchronized current pulses in
order to generate a magnetic field on the addressed memory cell (see Fig. 2b).



Magnetoresistive random access memory (MRAM) is a non-volatile random access memory technology that has been developing since the 1990s. The continuous increases in the density of existing memory technologies - mainly Flash RAM and DRAM - kept it in a niche role in the market, but its proponents believe that the advantages are so overwhelming that magnetoresistive RAM will eventually become a type dominant memory, a universal memory. It is currently in production by Everspin, and other companies such as GlobalFoundries and Samsung have announced product plans.

Unlike conventional RAM chip technologies, data in MRAM are not stored as electric current or current, but rather by magnetic storage elements. The elements are formed by two ferromagnetic plates, each of which can retain a magnetization, separated by a thin insulating layer. One of the two plates is a permanent magnet fixed to a particular polarity; the magnetization of the other plate can be changed to match that of an external field to store memory. This configuration is known as a magnetic tunnel junction and is the simplest structure for a MRAM bit. A memory device is constructed from a grid of such "cells".

The simplest method of reading is achieved by measuring the electrical resistance of the cell. A particular cell is selected (typically) by feeding an associated transistor that switches current from a supply line through the cell to ground. Due to the magnetoresistance of the tunnel, the electrical resistance of the cell changes due to the relative orientation of the magnetization in the two plates. By measuring the resulting current, resistance can be determined within any particular cell and, therefrom, the magnetization polarity of the writing plate. Typically, if the two plates have the same magnetization alignment (low strength state) it is considered to mean "1", while if the alignment is antiparallel, the resistance will be higher (high strength state) and this means "0" ".

Data is written to cells using a variety of media. In the simplest "classic" design, each cell is between a pair of writing lines arranged at right angles to each other, parallel to the cell, one above and one below the cell. When current is passed through them, a magnetic field is created at the junction, which the writing plate collects. This pattern of operation is similar to central memory, a system commonly used in the 1960s. This approach requires a fairly important current to generate the field, however, making it less interesting for low power applications, one of the main disadvantages of MRAM. Further, as the device is reduced in size, there comes a time when the induced field overlaps the adjacent cells along a small area, resulting in possible false scripts. This problem, the problem of selecting medium (or writing disturb), seems to set a fairly large minimum size for this type of cell. An experimental solution to this problem was to use circular domains written and read using the giant magnetoresistive effect, but it seems that this line of research is no longer active.

A more recent technique, the spin transfer torque (STT) or centrifugal transfer switching, uses spin-aligned ("polarized") electrons to directly activate the domains. Specifically, if the electrons that flow in a layer have to change their turn, this will develop a pair that will be transferred to the next layer. This decreases the amount of current needed to write the cells, making it approximately the same as the reading process. There are concerns that the "classic" type of MRAM cell will have difficulty at high densities because of the amount of current needed during the scripts, a problem STT avoids. For this reason, STT advocates expect the technique to be used for 65nm and smaller devices. The disadvantage is the need to maintain the consistency of the spin. In general, the STT requires much less write current than conventional MRAM or switching. Research in this field indicates that the STT current can be reduced up to 50 times using a new composite structure. However, a higher speed operation still requires a higher current.

Other potential configurations include "Thermostat-Assisted Switching" (TAS-MRAM), which briefly heats (remembers phase shift memory) magnetic tunnel joints during the writing process and keeps the MTJ stable at a colder temperature the rest of the time and "MRAM vertical transport" (VMRAM), which uses current through a vertical column to change the magnetic orientation, a geometric arrangement which reduces the problem of writing disturbance and therefore can be used with a density.

A review document provides the material details and challenges associated with MRAM in perpendicular geometry. The authors describe a new term called "Pentalemma" - which represents a conflict in five different requirements such as current writing, bit stability, readability, read / write speed and process integration with CMOS. Material selection and MRAM design are discussed to meet these requirements.