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Full Version: A New Reversible Design of BCD Adder Implementation using FPGA
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A New Reversible Design of BCD Adder Implementation using FPGA

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Introduction

Reversible circuits can generate unique output vector from each input vector, and vice versa, that is, there is a one-to-one mapping between the input and the output vectors.
Quantum computing needs to be build from reversible logic gates as quantum operations are reversible in nature.
This sets the major objective of optimizing the number of ancilla input qubits and the number of the garbage outputs in the reversible logic based quantum circuits


Litrerature survey

In 1980: This paper presents synthesis of reversible circuits using the Y-gate.
In 2004: We present a new linear-depth ripple-carry quantum addition circuit. Previous addition circuits required linearly many ancillary qubits.
In 2005: We construct a quantum circuit for addition of two n-bit binary numbers that uses no ancillary qubits
In 2008: Reversible logic has become one of the most promising research areas in the past few decades and has found its applications in several technologies such as low power CMOS, nano computing and optical computing

Advantages

The reversible BCD adder/subtractor can be used as a basic circuit for constructing the other reversible BCD arithmetic circuits.

An important advantage of GA to other synthesis methods is that various universal gates can be used in the synthesis.
Optimum or near optimum results can be obtained.
Many universal gates can be used for synthesis, quantum gates can be included and don’t cares can be handled.


Applications


The emerging computing paradigms, reversible logic appears to be promising due to its wide applications in emerging technologies such as quantum computing. The proposed the equivalent reversible design of the approach to design the reversible BCD adder optimized for the number of ancilla input bits and the number of garbage outputs.


Conclusion


In conclusions, we have presented efficient design of reversible BCD adder primarily optimizing the parameters of number of ancilla input bits and garbage outputs. The optimization of the quantum cost and the delay are also considered. The efficient design of the BCD adder depends on the design methodology used for designing the reversible ripple carry adder and the reversible binary to BCD converter.