02-05-2012, 11:44 AM
MMX™ Technology Architecture Overview
[attachment=21035]
Introduction
Intel’s MMX™ technology [1, 2] is an extension to the
basic Intel Architecture (IA) designed to improve
performance of multimedia and communication
algorithms. The technology includes new instructions and
data types, which achieve new levels of performance for
these algorithms on host processors.
MMX technology exploits the parallelism inherent in
many of these algorithms. Many of these algorithms
exhibit the property of “fixed” computation on a large
data set.
Definition Process
MMX technology’s definition process was an outstanding
adventure for its participants, a path with many twists and
turns. It was a bottom-up process. Engineering input and
managerial drive made MMX technology happen.
The definition of MMX technology was guided by a clear
set of priorities and goals set forth by the definition team.
Priority number one was to substantially improve the
performance of multimedia, communications, and
emerging Internet applications. Although targeted at this
market, any application that has execution constructs that
fit the SIMD architecture paradigm can enjoy substantial
performance speed-ups from the technology.
Packed Data Format
MMX technology defines new register formats for data
representation. The key feature of multimedia applications
is that the typical data size of operands is small. Most of
the data operands’ sizes are either a byte or a word (16
bits). Also, multimedia processing typically involves
performing the same computation on a large number of
adjacent data elements. These two properties lend
themselves to the use of SIMD computation.
Enhanced Instruction Set
MMX technology defines a rich set of instructions that
perform parallel operations on multiple data elements
packed into 64 bits (8x8-bit, 4x16-bit, or 2x32-bit fixedpoint
integer data elements). We view the MMX
technology instruction set as an extension of the basic
operations one would perform on a single datum in the
SIMD domain. Instructions that operate on packed bytes
were defined to support frequent image operations that
involve 8-bit pixels or one of the 8-bit color components
of 24/32-bit pixels (Red, Green, Blue, Alpha channel).
Summary
MMX technology implements a high-performance
technique that enhances the performance of Intel
Architecture microprocessors for media applications. The
core algorithms in these applications are computeintensive.
These algorithms perform operations on a large
amount of data, use small data types, and provide many
opportunities for parallelism. These algorithms are a
natural fit for SIMD architecture. MMX technology
defines a general purpose and easy-to-implement set of
primitives to operate on packed data types.
[attachment=21035]
Introduction
Intel’s MMX™ technology [1, 2] is an extension to the
basic Intel Architecture (IA) designed to improve
performance of multimedia and communication
algorithms. The technology includes new instructions and
data types, which achieve new levels of performance for
these algorithms on host processors.
MMX technology exploits the parallelism inherent in
many of these algorithms. Many of these algorithms
exhibit the property of “fixed” computation on a large
data set.
Definition Process
MMX technology’s definition process was an outstanding
adventure for its participants, a path with many twists and
turns. It was a bottom-up process. Engineering input and
managerial drive made MMX technology happen.
The definition of MMX technology was guided by a clear
set of priorities and goals set forth by the definition team.
Priority number one was to substantially improve the
performance of multimedia, communications, and
emerging Internet applications. Although targeted at this
market, any application that has execution constructs that
fit the SIMD architecture paradigm can enjoy substantial
performance speed-ups from the technology.
Packed Data Format
MMX technology defines new register formats for data
representation. The key feature of multimedia applications
is that the typical data size of operands is small. Most of
the data operands’ sizes are either a byte or a word (16
bits). Also, multimedia processing typically involves
performing the same computation on a large number of
adjacent data elements. These two properties lend
themselves to the use of SIMD computation.
Enhanced Instruction Set
MMX technology defines a rich set of instructions that
perform parallel operations on multiple data elements
packed into 64 bits (8x8-bit, 4x16-bit, or 2x32-bit fixedpoint
integer data elements). We view the MMX
technology instruction set as an extension of the basic
operations one would perform on a single datum in the
SIMD domain. Instructions that operate on packed bytes
were defined to support frequent image operations that
involve 8-bit pixels or one of the 8-bit color components
of 24/32-bit pixels (Red, Green, Blue, Alpha channel).
Summary
MMX technology implements a high-performance
technique that enhances the performance of Intel
Architecture microprocessors for media applications. The
core algorithms in these applications are computeintensive.
These algorithms perform operations on a large
amount of data, use small data types, and provide many
opportunities for parallelism. These algorithms are a
natural fit for SIMD architecture. MMX technology
defines a general purpose and easy-to-implement set of
primitives to operate on packed data types.