01-06-2012, 02:01 PM
Virtual Prototyping and Performance Analysis of RapidIO-based System Architectures for Space-Based Radar
[attachment=23865]
Overview
Simulative analysis of Space-Based Radar (SBR) systems using RapidIO interconnection networks
RapidIO (RIO) is a high-performance, switched interconnect for embedded systems
Can scale to many nodes
Provides better bisection bandwidth than existing bus-based technologies
Study optimal method of constructing scalable RIO-based systems for Ground Moving Target Indicator (GMTI)
Identify system-level tradeoffs in system designs
Discrete-event simulation of RapidIO network, processing elements, and GMTI algorithm
Identify limitations of RIO design for SBR
Determine effectiveness of various GMTI algorithm partitionings over RIO network.
Background- RapidIO
Three-layered, embedded system interconnect architecture
Logical – memory mapped I/O, message passing, and globally shared memory
Transport
Physical – serial and parallel
Point-to-point, packet-switched interconnect
Peak single-link throughput ranging from 2 to 64 Gb/s
Focus on 16-bit parallel LVDS RIO implementation for satellite systems
Model Library Overview
Modeling library created using Mission Level Designer (MLD), a commercial discrete-event simulation modeling tool
C++-based, block-level, hierarchical modeling tool
Algorithm modeling accomplished via script-based processing
All processing nodes read from a global script file to determine when/where to send data, and when/how long to compute.
Our model library includes:
RIO central-memory switch
Compute node with RIO endpoint
GMTI traffic source/sink
RIO logical message-passing layer
Transport and parallel physical layers
[attachment=23865]
Overview
Simulative analysis of Space-Based Radar (SBR) systems using RapidIO interconnection networks
RapidIO (RIO) is a high-performance, switched interconnect for embedded systems
Can scale to many nodes
Provides better bisection bandwidth than existing bus-based technologies
Study optimal method of constructing scalable RIO-based systems for Ground Moving Target Indicator (GMTI)
Identify system-level tradeoffs in system designs
Discrete-event simulation of RapidIO network, processing elements, and GMTI algorithm
Identify limitations of RIO design for SBR
Determine effectiveness of various GMTI algorithm partitionings over RIO network.
Background- RapidIO
Three-layered, embedded system interconnect architecture
Logical – memory mapped I/O, message passing, and globally shared memory
Transport
Physical – serial and parallel
Point-to-point, packet-switched interconnect
Peak single-link throughput ranging from 2 to 64 Gb/s
Focus on 16-bit parallel LVDS RIO implementation for satellite systems
Model Library Overview
Modeling library created using Mission Level Designer (MLD), a commercial discrete-event simulation modeling tool
C++-based, block-level, hierarchical modeling tool
Algorithm modeling accomplished via script-based processing
All processing nodes read from a global script file to determine when/where to send data, and when/how long to compute.
Our model library includes:
RIO central-memory switch
Compute node with RIO endpoint
GMTI traffic source/sink
RIO logical message-passing layer
Transport and parallel physical layers