02-06-2012, 03:20 PM
DEVELOPMENTOF VIDEO DISPLY PROCESSOR ON FPGA
[attachment=24024]
ABSTRACT:
A video display processor (VDP) for use with a central processing unit, a video RAM (VRAM) and a video display unit is capable of writing video image data supplied from an external video device such as a television set into the VRAM. The VDP comprises a first input terminal for receiving the external video image data and a second input terminal for receiving horizontal and vertical synchronization signals from the external video device. The VDP generates address data in accordance with the horizontal and vertical synchronization signals and supplies the address data to the VRAM when processing of the external video image data is designated. The VDP also supplies the received external video image data to the VRAM thereby to write the external video image data into address of the VRAM designated by the address data. The external video image data may be either color codes representative of colors of display elements of a video image displayed at the external video device or data representative of amplitude level of an analog video signal outputted from the external video device.
The chip is going to be coded using HDL then functional simulation will be performed, then the code will be synthesized and logic simulation will be performed. Then place and route will be done and fitted on to Spartan-3E FPGA. Then timing simulation will be done to check the complete functionality and design specifications. The complete chip functionality is going to be demonstrated on Spartan-3E FPGA.
SOFTWARE: VHDL.
DEVELOPMENT TOOLS: XILINX ISE, MODELSIM, CHIPSCOPE.
TARGET DEVICE: SPARTAN-3E DEVICE FROM XILINX.
APPLICATIONS: For use in terminal equipment for a computer, television game apparatus or the like.
ADVANTAGES: Low Power, Low cost, Small device foot print, Long battery life, System on Chip Implementation.
[attachment=24024]
ABSTRACT:
A video display processor (VDP) for use with a central processing unit, a video RAM (VRAM) and a video display unit is capable of writing video image data supplied from an external video device such as a television set into the VRAM. The VDP comprises a first input terminal for receiving the external video image data and a second input terminal for receiving horizontal and vertical synchronization signals from the external video device. The VDP generates address data in accordance with the horizontal and vertical synchronization signals and supplies the address data to the VRAM when processing of the external video image data is designated. The VDP also supplies the received external video image data to the VRAM thereby to write the external video image data into address of the VRAM designated by the address data. The external video image data may be either color codes representative of colors of display elements of a video image displayed at the external video device or data representative of amplitude level of an analog video signal outputted from the external video device.
The chip is going to be coded using HDL then functional simulation will be performed, then the code will be synthesized and logic simulation will be performed. Then place and route will be done and fitted on to Spartan-3E FPGA. Then timing simulation will be done to check the complete functionality and design specifications. The complete chip functionality is going to be demonstrated on Spartan-3E FPGA.
SOFTWARE: VHDL.
DEVELOPMENT TOOLS: XILINX ISE, MODELSIM, CHIPSCOPE.
TARGET DEVICE: SPARTAN-3E DEVICE FROM XILINX.
APPLICATIONS: For use in terminal equipment for a computer, television game apparatus or the like.
ADVANTAGES: Low Power, Low cost, Small device foot print, Long battery life, System on Chip Implementation.