20-06-2012, 12:57 PM
Hardware Implementation of QPSK Modulator for Satellite Communication
[attachment=24892]
Description of QPSK Modulator
An M-phase PSK modulator puts the phase of carrier into one of M - states according to the value of a input .
By increasing states , it can transmit more data in same bandwidth
Matlab Simulation of QPSK Modulator
It is used for band limit the signal bandwidth .
The objective is to create a pulse that resembles the sin x/x shape.
So that receiver samples at intervals of Tb , where Tb is the bit period .
At the sampling instant , the “tails” from all preceding pulses have zero values
Hardware Implementation of QPSK Modulator
DSP systems are required to perform intensive arithmetic operations such as multiplications and additions.
FPGAs can be used to implement DSP system as they provide tremendous computational power by using highly parallel architecture for high performance.
FPGAs dedicated for DSP has Embedded multipliers and distributed RAM for storage of coefficients.
Conclusion
QPSK modulator has been successfully implemented on the Xilinx Virtex – 4 Development kit. QPSK Modulator is simulated in Matlab Software to verify and compare its functionality taking into account the limitations imposed by the hardware
The modulator algorithm has been implemented on FPGA using the VHSIC hardware description language (VHDL) on Xilinx ISE 8.2i. Simulated waveform is compared with actual output on the digital oscilloscope and spectrum analyzer.
The designed modulator may be used as a test bed for the functional verification of various RF subsystems which requires to be parameterized under modulated signal conditions
[attachment=24892]
Description of QPSK Modulator
An M-phase PSK modulator puts the phase of carrier into one of M - states according to the value of a input .
By increasing states , it can transmit more data in same bandwidth
Matlab Simulation of QPSK Modulator
It is used for band limit the signal bandwidth .
The objective is to create a pulse that resembles the sin x/x shape.
So that receiver samples at intervals of Tb , where Tb is the bit period .
At the sampling instant , the “tails” from all preceding pulses have zero values
Hardware Implementation of QPSK Modulator
DSP systems are required to perform intensive arithmetic operations such as multiplications and additions.
FPGAs can be used to implement DSP system as they provide tremendous computational power by using highly parallel architecture for high performance.
FPGAs dedicated for DSP has Embedded multipliers and distributed RAM for storage of coefficients.
Conclusion
QPSK modulator has been successfully implemented on the Xilinx Virtex – 4 Development kit. QPSK Modulator is simulated in Matlab Software to verify and compare its functionality taking into account the limitations imposed by the hardware
The modulator algorithm has been implemented on FPGA using the VHSIC hardware description language (VHDL) on Xilinx ISE 8.2i. Simulated waveform is compared with actual output on the digital oscilloscope and spectrum analyzer.
The designed modulator may be used as a test bed for the functional verification of various RF subsystems which requires to be parameterized under modulated signal conditions