27-06-2012, 03:44 PM
ARCHITECTURE OVERVIEW
[attachment=25787]
TMS320C6713 - ARCHITECTURE OVERVIEW
ARCHITECTURE
The TMS320C6713 is a 32 bit floating point processor can handle 1800 MIPS / 1350
MFLOPS. The following figure shows the block diagram for the TMS320C6713 Digital
Signal Processor. The C6713 devices come with program memory, which, on some
devices, can be used as a program cache. The devices also have varying sizes of data
memory. Peripherals such as a direct memory access (DMA) controller, power down
logic and external memory interface (EMIF) usually come with the CPU, while
peripherals such as serial ports and host ports are on only certain devices.
INTERNAL MEMORY
The C6713 have a 32-bit, byte-addressable address space. Internal (on-chip) memory
is organized in separate data and program spaces. When off-chip memory is used,
these spaces are unified on most devices to a single memory space via the external
memory interface (EMIF). The C6713 have two 32-bit internal ports to access internal
data memory. The C6713 has a single internal port to access internal program
memory, with an instruction-fetch width of 256 bits.
GENERAL-PURPOSE REGISTER FILES
There are two general-purpose register files (A and B) in the C6713 data paths. For the
C6713 DSPs, each of these files contains 16 32-bit registers (A0-A15 for file A and B0-
B15 for file B). The general-purpose registers can be used for data, data address
pointers, or condition registers. The C6713 general-purpose register files support data
ranging in size from packed 16-bit data through 40-bit fixed-point and 64-bit floating
point data.
Values larger than 32 bits, such as 40-bit long and 64-bit float quantities, are stored
in register pairs. In these the 32 LSBs of data are placed in an even-numbered register
and the remaining 8 or 32 MSBs in the next upper register (which is always an oddnumbered
register). The C64x register file extends this by additionally supporting
packed 8-bit types and 64-bit fixed-point data types. Packed data types store either
four 8-bit values or two 16-bit values in a single 32-bit register, or four 16-bit values
in a 64-bit register pair. There are 16 valid register pairs for 40-bit and 64-bit data in
the C6713 cores, and 32 valid register pairs for 40-bit and 64-bit data in the C64x core,
as shown in Table. In assembly language syntax, a colon between the register names
denotes the register pairs, and the odd-numbered register is specified first.
[attachment=25787]
TMS320C6713 - ARCHITECTURE OVERVIEW
ARCHITECTURE
The TMS320C6713 is a 32 bit floating point processor can handle 1800 MIPS / 1350
MFLOPS. The following figure shows the block diagram for the TMS320C6713 Digital
Signal Processor. The C6713 devices come with program memory, which, on some
devices, can be used as a program cache. The devices also have varying sizes of data
memory. Peripherals such as a direct memory access (DMA) controller, power down
logic and external memory interface (EMIF) usually come with the CPU, while
peripherals such as serial ports and host ports are on only certain devices.
INTERNAL MEMORY
The C6713 have a 32-bit, byte-addressable address space. Internal (on-chip) memory
is organized in separate data and program spaces. When off-chip memory is used,
these spaces are unified on most devices to a single memory space via the external
memory interface (EMIF). The C6713 have two 32-bit internal ports to access internal
data memory. The C6713 has a single internal port to access internal program
memory, with an instruction-fetch width of 256 bits.
GENERAL-PURPOSE REGISTER FILES
There are two general-purpose register files (A and B) in the C6713 data paths. For the
C6713 DSPs, each of these files contains 16 32-bit registers (A0-A15 for file A and B0-
B15 for file B). The general-purpose registers can be used for data, data address
pointers, or condition registers. The C6713 general-purpose register files support data
ranging in size from packed 16-bit data through 40-bit fixed-point and 64-bit floating
point data.
Values larger than 32 bits, such as 40-bit long and 64-bit float quantities, are stored
in register pairs. In these the 32 LSBs of data are placed in an even-numbered register
and the remaining 8 or 32 MSBs in the next upper register (which is always an oddnumbered
register). The C64x register file extends this by additionally supporting
packed 8-bit types and 64-bit fixed-point data types. Packed data types store either
four 8-bit values or two 16-bit values in a single 32-bit register, or four 16-bit values
in a 64-bit register pair. There are 16 valid register pairs for 40-bit and 64-bit data in
the C6713 cores, and 32 valid register pairs for 40-bit and 64-bit data in the C64x core,
as shown in Table. In assembly language syntax, a colon between the register names
denotes the register pairs, and the odd-numbered register is specified first.