28-06-2012, 04:52 PM
CCD and CMOS Imaging Array Technologies: Technology Review
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Abstract
This paper provides an overview of both CCD (charged coupled device) and CMOS (complimentary metal oxide semiconductor) imaging array technologies. CCDs have been in existence for nearly 30 years and the technology has matured to the point where very large, consistent (low numbers of defects) devices can now be produced. However, CCDs suffer from a number of drawbacks, including cost, complex power supplies and support electronics. CMOS imaging arrays, on the other hand, are still in their infancy, but are set to develop rapidly and offer a number of potential benefits over CCDs. This review provides an overview of both CCD and CMOS imaging technology, and includes explanations of how images are captured and read out from the imaging arrays. Also covered are issues such as performance characteristics, cost considerations and the future of imaging arrays. This review does not provide details of colour sensors, colour filter arrays and colour interpolation, etc., as these will be the subject of a separate report.
Introduction to CCDs
The Charged Coupled Device (CCD) was invented in 1970 by Willard Boyle and George Smith at Bell Laboratories, USA [Sharma97]. The idea originated from research into magnetic bubble memories, and as with many great inventions, Smith is quoted as saying “[we] invented charged-coupled devices in an hour” [Lucent96]. In the intervening twenty-eight years, CCDs have found their way into a huge range of products including fax machines, photocopiers, cameras, scanners and even children’s toys.
Examples of CCD Arrays
Before moving on to explain the operation of CCDs in more detail, it is useful to illustrate what CCDs actually look like. The following table shows three different devices for comparison, along with their respective pixel counts. The transfer method will be explained in a subsequent section.
CCD Fundamentals
As mentioned above, each pixel that makes up a CCD is essentially a MOS capacitor, of which there are two types: surface channel and buried channel. The two differ only slightly in their fabrication, however; buried channel capacitors offer major advantages, and because of this, nearly all CCDs manufactured today use this preferred structure.
A schematic cross section of a buried channel capacitor is shown in Figure 1 [Sharma97, SITe94]. The device is typically built on a p-type silicon substrate (approx 300m thick) with an n-type layer (approx 1m thick) formed on the surface. Next, a thin silicon dioxide layer (approx 0.1m thick) is grown followed by a metal electrode (or gate). The application of a
positive voltage to the electrode reverse biases the p-n junction and this causes a potential well to form in the n-type silicon directly below the electrode. Incident light generates electron-hole pairs in the depletion region, and due to the applied voltage, the electrons migrate upwards into the n-type silicon layer and are trapped in the potential well [Muncaster85]. The build up of negative charge is thus directly proportional to the level of incident light.
The Charge Readout Process
The charge readout process takes place in two stages. The first involves moving the pixel charges across the surface of the array. The second involves reading out the pixel charges into a register prior to being digitised.
[attachment=25995]
Abstract
This paper provides an overview of both CCD (charged coupled device) and CMOS (complimentary metal oxide semiconductor) imaging array technologies. CCDs have been in existence for nearly 30 years and the technology has matured to the point where very large, consistent (low numbers of defects) devices can now be produced. However, CCDs suffer from a number of drawbacks, including cost, complex power supplies and support electronics. CMOS imaging arrays, on the other hand, are still in their infancy, but are set to develop rapidly and offer a number of potential benefits over CCDs. This review provides an overview of both CCD and CMOS imaging technology, and includes explanations of how images are captured and read out from the imaging arrays. Also covered are issues such as performance characteristics, cost considerations and the future of imaging arrays. This review does not provide details of colour sensors, colour filter arrays and colour interpolation, etc., as these will be the subject of a separate report.
Introduction to CCDs
The Charged Coupled Device (CCD) was invented in 1970 by Willard Boyle and George Smith at Bell Laboratories, USA [Sharma97]. The idea originated from research into magnetic bubble memories, and as with many great inventions, Smith is quoted as saying “[we] invented charged-coupled devices in an hour” [Lucent96]. In the intervening twenty-eight years, CCDs have found their way into a huge range of products including fax machines, photocopiers, cameras, scanners and even children’s toys.
Examples of CCD Arrays
Before moving on to explain the operation of CCDs in more detail, it is useful to illustrate what CCDs actually look like. The following table shows three different devices for comparison, along with their respective pixel counts. The transfer method will be explained in a subsequent section.
CCD Fundamentals
As mentioned above, each pixel that makes up a CCD is essentially a MOS capacitor, of which there are two types: surface channel and buried channel. The two differ only slightly in their fabrication, however; buried channel capacitors offer major advantages, and because of this, nearly all CCDs manufactured today use this preferred structure.
A schematic cross section of a buried channel capacitor is shown in Figure 1 [Sharma97, SITe94]. The device is typically built on a p-type silicon substrate (approx 300m thick) with an n-type layer (approx 1m thick) formed on the surface. Next, a thin silicon dioxide layer (approx 0.1m thick) is grown followed by a metal electrode (or gate). The application of a
positive voltage to the electrode reverse biases the p-n junction and this causes a potential well to form in the n-type silicon directly below the electrode. Incident light generates electron-hole pairs in the depletion region, and due to the applied voltage, the electrons migrate upwards into the n-type silicon layer and are trapped in the potential well [Muncaster85]. The build up of negative charge is thus directly proportional to the level of incident light.
The Charge Readout Process
The charge readout process takes place in two stages. The first involves moving the pixel charges across the surface of the array. The second involves reading out the pixel charges into a register prior to being digitised.