28-06-2012, 05:39 PM
DESIGN AND IMPLEMENTATION OF MULTICORE IP
A system on a chip or system on chip (SoC or SOC) is an integrated circuit (IC) that integrates all components of a computer or other electronic system into a single chip. It may contain digital, analog, mixed-signal, and often radio-frequency functions—all on a single chip substrate. A typical application is in the area of embedded systems. SoC consists of both the hardware and the software that controls the microcontroller, microprocessor or DSP cores, peripherals and interfaces. The design flow for an SoC aims to develop this hardware and software in parallel.
USI is undoubtedly one of the most sought after means of serial communication. It is because of its simplicity and speed that it is one of the most widely used protocols. This paper aims at establishing SOC (system off chip communication) between an FPGA based core and an embedded core (Arduino). Firstly, a transmitter and receiver module for UART IP (intellectual property) was developed using Xilinx ISE© tool and dumped into the FPGA board. Secondly, an embedded program for serial communication implementing UART was also developed and dumped into the Arduino controller. Finally both the cores were serially connected and data was successfully sent from one core to another and vice-versa. This setup enables in providing the user with a much faster processing time as it is well known that an FPGA core is faster than an embedded core.
In this paper, we are look at how the different multi-core topologies and the associated processor power management technologies. As communication is a part of design we have chosen a USI as a protocol to communicate through various processors. USI is a kind of serial communication protocol; mostly used for short-distance, low speed, low-cost data exchange between computer and peripherals. During the actual industrial production, sometimes we do not need the full functionality of USI, but simply integrate its core part. USI includes three kernel modules which are the baud rate generator, receiver and transmitter. The USI is implemented with VERILOG language can be integrated into the FPGA to achieve compact, stable and reliable data transmission and then be communicated through Embedded Processors. It’s significant for the design of SOC.
A system on a chip or system on chip (SoC or SOC) is an integrated circuit (IC) that integrates all components of a computer or other electronic system into a single chip. It may contain digital, analog, mixed-signal, and often radio-frequency functions—all on a single chip substrate. A typical application is in the area of embedded systems. SoC consists of both the hardware and the software that controls the microcontroller, microprocessor or DSP cores, peripherals and interfaces. The design flow for an SoC aims to develop this hardware and software in parallel.
USI is undoubtedly one of the most sought after means of serial communication. It is because of its simplicity and speed that it is one of the most widely used protocols. This paper aims at establishing SOC (system off chip communication) between an FPGA based core and an embedded core (Arduino). Firstly, a transmitter and receiver module for UART IP (intellectual property) was developed using Xilinx ISE© tool and dumped into the FPGA board. Secondly, an embedded program for serial communication implementing UART was also developed and dumped into the Arduino controller. Finally both the cores were serially connected and data was successfully sent from one core to another and vice-versa. This setup enables in providing the user with a much faster processing time as it is well known that an FPGA core is faster than an embedded core.
In this paper, we are look at how the different multi-core topologies and the associated processor power management technologies. As communication is a part of design we have chosen a USI as a protocol to communicate through various processors. USI is a kind of serial communication protocol; mostly used for short-distance, low speed, low-cost data exchange between computer and peripherals. During the actual industrial production, sometimes we do not need the full functionality of USI, but simply integrate its core part. USI includes three kernel modules which are the baud rate generator, receiver and transmitter. The USI is implemented with VERILOG language can be integrated into the FPGA to achieve compact, stable and reliable data transmission and then be communicated through Embedded Processors. It’s significant for the design of SOC.