03-07-2012, 04:10 PM
crosstalk communication ICs serdes
Crosstalk, which is an unintended interference of communication channels, can wreak havoc on a communication IC. While being an increasing concern for devices at 28Gb/s and beyond, panellists at DesignCon 2012 lamented the lack of a perfect solution to this problem.
The panellists, including representatives from test and measurement equipment vendors Tektronix Inc., Agilent Technologies Inc. and LeCroy Corp., acknowledged that there are currently no tools that enable designers to adequately measure the effects of various types of crosstalk, thus preventing them from modifications that mitigate the problem.
To make matters worse, panellists said, there is a major disconnect between what communications standards such as PCI Express specify and what is actually needed to build chips that send and receive at cutting-edge speeds. "There is a fundamental difference between a silicon implementation and the reference equalisers you see in these emerging standards such as PCIExpress," said Mark Marlett, director of engineering responsible for Serdes development at IP vendor, Analog Bits Inc.
While there is no fail safe solution for measuring the effects of crosstalk on a chip, Mike Peng Li, principal architect and distinguished engineer at programmable logic vendor Altera Corp., said the best existing solution is decision feedback equaliser (DFE), a type of circuit that can be inserted into a design to minimise crosstalk. "The DFE is the best medicine we have," Li said.
DFE is "a medicine that doesn't have the side effect of amplifying noise," said Martin Miller, chief scientist at LeCroy.
Panellists generally agreed with Li that DFE represents the best hope currently. But the method has its limitations. DFE has a problem with "avalanching" errors, said Ransom Stephens, a tech consultant and writer who served as the panel's moderator. "When it stumbles, it falls," Stephens said.
At one point, Stephens chided test and measurements on the panel, joking that they were working on solutions for the problem of crosstalk that they were reluctant to mention publicly. "There are proprietary solutions being developed," Stephens said after the panel concluded.
"We do have some ideas and some concepts on how to measure crosstalk and what we can do about it," said Pavel Zivny, a domain expert for serial data at Tektronix.
Panellists admitted that the ultimate solution to the crosstalk problem is a move to channels based on silicon photonics. Zivny joked at one point that audience members should drain their children's college funds to invest in any company involved in silicon photonics.
Li said the fundamental limit for communication chips using current CMOS technology is probably around 50- to 60Gbps. After that, he said, some type of photonics scheme must be implemented for communications chips to push the envelope further. Li lamented the fact that only a very few companies, chiefly Intel Corp. and IBM Corp., are doing the fundamental research needed to move silicon photonics onto chips, but he predicted that "gradual changes" over the next three to four years would move that technology into semiconductors, much sooner than many observers think that it will happen.
Crosstalk, which is an unintended interference of communication channels, can wreak havoc on a communication IC. While being an increasing concern for devices at 28Gb/s and beyond, panellists at DesignCon 2012 lamented the lack of a perfect solution to this problem.
The panellists, including representatives from test and measurement equipment vendors Tektronix Inc., Agilent Technologies Inc. and LeCroy Corp., acknowledged that there are currently no tools that enable designers to adequately measure the effects of various types of crosstalk, thus preventing them from modifications that mitigate the problem.
To make matters worse, panellists said, there is a major disconnect between what communications standards such as PCI Express specify and what is actually needed to build chips that send and receive at cutting-edge speeds. "There is a fundamental difference between a silicon implementation and the reference equalisers you see in these emerging standards such as PCIExpress," said Mark Marlett, director of engineering responsible for Serdes development at IP vendor, Analog Bits Inc.
While there is no fail safe solution for measuring the effects of crosstalk on a chip, Mike Peng Li, principal architect and distinguished engineer at programmable logic vendor Altera Corp., said the best existing solution is decision feedback equaliser (DFE), a type of circuit that can be inserted into a design to minimise crosstalk. "The DFE is the best medicine we have," Li said.
DFE is "a medicine that doesn't have the side effect of amplifying noise," said Martin Miller, chief scientist at LeCroy.
Panellists generally agreed with Li that DFE represents the best hope currently. But the method has its limitations. DFE has a problem with "avalanching" errors, said Ransom Stephens, a tech consultant and writer who served as the panel's moderator. "When it stumbles, it falls," Stephens said.
At one point, Stephens chided test and measurements on the panel, joking that they were working on solutions for the problem of crosstalk that they were reluctant to mention publicly. "There are proprietary solutions being developed," Stephens said after the panel concluded.
"We do have some ideas and some concepts on how to measure crosstalk and what we can do about it," said Pavel Zivny, a domain expert for serial data at Tektronix.
Panellists admitted that the ultimate solution to the crosstalk problem is a move to channels based on silicon photonics. Zivny joked at one point that audience members should drain their children's college funds to invest in any company involved in silicon photonics.
Li said the fundamental limit for communication chips using current CMOS technology is probably around 50- to 60Gbps. After that, he said, some type of photonics scheme must be implemented for communications chips to push the envelope further. Li lamented the fact that only a very few companies, chiefly Intel Corp. and IBM Corp., are doing the fundamental research needed to move silicon photonics onto chips, but he predicted that "gradual changes" over the next three to four years would move that technology into semiconductors, much sooner than many observers think that it will happen.