07-07-2012, 10:57 AM
Achieving PWM using Atmega16 Timer
[attachment=27050]
Timers
A timer (also called as counter) is simply a device that counts upon receiving clock pulses. The timer increments (or decrements in certain cases) its count with each clock tick it receives.
A timer is usually specified by the maximum value to which it can count (called MAX) beyond which it overflows and resets to zero (BOTTOM). Thus an 8-bit timer/counter can count from 0 through 255 and a 16-bit timer/counter can count from 0 through 65,535.
The speed of counting can be controlled by varying the speed of clock input to it. This is done by prescaling the clock of the microcontroller. By prescaling, we feed a fraction of the CPU clock to the timer
PWM
PWM waves of required duty cycle can be generating by configuring the timers with suitable values. PWM can be used to control servo motors, perform DAC (Digital to Analogue Conversion) etc.
PWM waves will be available on the OC1A pin (pin 15 on ATMEGA8, 19 on ATMEGA16) once it is setup.
In PWM, we generate square waves whose duty cycle can be varied. Duty cycle refers to the fraction of the time period of the wave for which the signal is in high state (or simply ON state).
For example, for a square wave of period 100ms, if the duty cycle=50%, the signal will be in high state for precisely 50 ms and in low state for the next 50ms that make up the period.
If the duty cycle =20 %, the signal will be high for 20ms and low for the remaining 80ms.
An interesting aspect of PWM is that we can actually perform DAC (Digital to Analogue Conversion), the output voltage is proportional to the duty cycle we set. i.e. for example, if the duty cycle is 50%, the average voltage available on the OCA1 pin will be 2.5V and for duty cycle = 30 %, the output voltage= .3x 5 V = 1.5 V and so on.
Timer in Compare Mode (CTC mode)
The Output Compare mode is used to perform repeated timing. The value in TCNT1 (which is counting up if not stopped by the prescaler select bits) is permanently compared to the value in OCR1A. When these values are equal to each other, the Output Compare Interrupt Flag (OCF in TIFR) is set and an ISR can be called. By setting the CTC1 bit in TCCR1B, the timer can be automatically cleared upon compare match.
The AVR timer can be operated in a mode called CTC mode or Clear on Timer Capture mode in which we can set the timer to compare its count with a certain value set in OCR1A (Output Compare Register 1 A) register or OCR1B register and generate an interrupt or manipulate the OC1A or OC1B pin whenever a match occurs (i.e. when TCNT=OCR1A or TCNT=OCR1B). CTC mode can be used to generate accurate timings and square waves of desired frequency.
CTC mode can be enabled programmatically by setting WGM 12 bit=1 in TCCR1B register.
[attachment=27050]
Timers
A timer (also called as counter) is simply a device that counts upon receiving clock pulses. The timer increments (or decrements in certain cases) its count with each clock tick it receives.
A timer is usually specified by the maximum value to which it can count (called MAX) beyond which it overflows and resets to zero (BOTTOM). Thus an 8-bit timer/counter can count from 0 through 255 and a 16-bit timer/counter can count from 0 through 65,535.
The speed of counting can be controlled by varying the speed of clock input to it. This is done by prescaling the clock of the microcontroller. By prescaling, we feed a fraction of the CPU clock to the timer
PWM
PWM waves of required duty cycle can be generating by configuring the timers with suitable values. PWM can be used to control servo motors, perform DAC (Digital to Analogue Conversion) etc.
PWM waves will be available on the OC1A pin (pin 15 on ATMEGA8, 19 on ATMEGA16) once it is setup.
In PWM, we generate square waves whose duty cycle can be varied. Duty cycle refers to the fraction of the time period of the wave for which the signal is in high state (or simply ON state).
For example, for a square wave of period 100ms, if the duty cycle=50%, the signal will be in high state for precisely 50 ms and in low state for the next 50ms that make up the period.
If the duty cycle =20 %, the signal will be high for 20ms and low for the remaining 80ms.
An interesting aspect of PWM is that we can actually perform DAC (Digital to Analogue Conversion), the output voltage is proportional to the duty cycle we set. i.e. for example, if the duty cycle is 50%, the average voltage available on the OCA1 pin will be 2.5V and for duty cycle = 30 %, the output voltage= .3x 5 V = 1.5 V and so on.
Timer in Compare Mode (CTC mode)
The Output Compare mode is used to perform repeated timing. The value in TCNT1 (which is counting up if not stopped by the prescaler select bits) is permanently compared to the value in OCR1A. When these values are equal to each other, the Output Compare Interrupt Flag (OCF in TIFR) is set and an ISR can be called. By setting the CTC1 bit in TCCR1B, the timer can be automatically cleared upon compare match.
The AVR timer can be operated in a mode called CTC mode or Clear on Timer Capture mode in which we can set the timer to compare its count with a certain value set in OCR1A (Output Compare Register 1 A) register or OCR1B register and generate an interrupt or manipulate the OC1A or OC1B pin whenever a match occurs (i.e. when TCNT=OCR1A or TCNT=OCR1B). CTC mode can be used to generate accurate timings and square waves of desired frequency.
CTC mode can be enabled programmatically by setting WGM 12 bit=1 in TCCR1B register.