04-08-2012, 12:04 PM
Enhancement of Fault Injection Techniques Based on the Modification of VHDL Code
[attachment=30184]
Abstract
Deep submicrometer devices are expected to be
increasingly sensitive to physical faults. For this reason, fault-tolerance
mechanisms are more and more required in VLSI circuits.
So, validating their dependability is a prior concern in the design
process. Fault injection techniques based on the use of hardware
description languages offer important advantages with regard to
other techniques. First, as this type of techniques can be applied
during the design phase of the system, they permit reducing the
time-to-market. Second, they present high controllability and
reachability. Among the different techniques, those based on
the use of saboteurs and mutants are especially attractive due
to their high fault modeling capability. However, implementing
automatically these techniques in a fault injection tool is difficult.
Especially complex are the insertion of saboteurs and the
generation of mutants.
INTRODUCTION
THE NEW DEEP submicrometer technologies are increasingly
sensitive to physical faults, both to those due to external
phenomena (i.e., transient faults such as single event upsets
(SEUs), single event transient (SETs), etc.) and to internal
defects (i.e., intermittent and permanent faults). Moreover, this
sensitivity implies not only a raise of the fault rate, but also an
increment of the likelihood of appearing multiple faults [1]–[3].
For this reason, the dependability of systems must be analyzed.
This analysis can be either the study of the incidence of faults
on the system (called error syndrome analysis) or checking the
design specifications (called validation). The objective of the
error syndrome analysis is to detect those parts of the system
which are most sensitive to faults, and eventually, to choose
the most suitable fault-tolerance mechanisms (FTMs). The aim
of the validation is to verify that the system and/or its built-in
FTMs accomplish the design specifications in presence of faults.
VHDL-BASED FAULT INJECTION TECHNIQUES
Fault Injection Using Simulator Commands
This fault injection technique is based on using the commands
of the simulator at simulation time, in order to modify the value
or timing of the signals and variables of the model [24]. Moreover,
as VHDL generic constants are managed as special variables,
it is possible to inject some non-usual fault models, such
as delay faults [8].
Using simulator commands it is possible to inject transient,
permanent, and intermittent faults. Though, there exists one restriction:
due to the special nature of variables in VHDL, it is
not possible to inject permanent faults in variables.
This technique is the easiest one to implement and its temporal
cost (to perform the simulation) is by far the lowest. However,
the number of fault models that can be injected is smaller
than with the other techniques.
FAULT INJECTION ENVIRONMENT
The GSTF has developed a fault injection tool called VFIT
(VHDL-based fault injection tool) [22], [23], that runs on PC
computers (or compatible) under Windows and is model-independent.
Although it admits models at any abstraction level, it
has been mainly used on models at gate and RT levels.
With VFIT it is possible to inject faults automatically applying
the simulator commands technique. It is also feasible to
inject faults using saboteurs and mutants, but in this case, the
injection process needs the intervention of the user because the
insertion of the saboteurs and the generation of mutants are not
automatic.
CONCLUSION
In this paper, new methods to implement and use saboteurs
and mutants into VHDL models in an automatic way have been
proposed.
The new models of saboteurs fix some problems of ambiguity
that the previous approach had. These problems prevented their
automatic insertion. Moreover, the new models have been implemented
in such a way that they diminish the overhead, by reducing
the number of signals required to manage bidirectional
saboteurs. Another enhancement respect to prior models is that
they allow to inject more fault models. The numeric results of
comparing both proposals do not reflect these improvements. Instead,
a slight temporal overhead has been introduced. Anyway,
the overall temporal cost (the sum of simulation and analysis
times) of this technique is affordable with modern computers.
[attachment=30184]
Abstract
Deep submicrometer devices are expected to be
increasingly sensitive to physical faults. For this reason, fault-tolerance
mechanisms are more and more required in VLSI circuits.
So, validating their dependability is a prior concern in the design
process. Fault injection techniques based on the use of hardware
description languages offer important advantages with regard to
other techniques. First, as this type of techniques can be applied
during the design phase of the system, they permit reducing the
time-to-market. Second, they present high controllability and
reachability. Among the different techniques, those based on
the use of saboteurs and mutants are especially attractive due
to their high fault modeling capability. However, implementing
automatically these techniques in a fault injection tool is difficult.
Especially complex are the insertion of saboteurs and the
generation of mutants.
INTRODUCTION
THE NEW DEEP submicrometer technologies are increasingly
sensitive to physical faults, both to those due to external
phenomena (i.e., transient faults such as single event upsets
(SEUs), single event transient (SETs), etc.) and to internal
defects (i.e., intermittent and permanent faults). Moreover, this
sensitivity implies not only a raise of the fault rate, but also an
increment of the likelihood of appearing multiple faults [1]–[3].
For this reason, the dependability of systems must be analyzed.
This analysis can be either the study of the incidence of faults
on the system (called error syndrome analysis) or checking the
design specifications (called validation). The objective of the
error syndrome analysis is to detect those parts of the system
which are most sensitive to faults, and eventually, to choose
the most suitable fault-tolerance mechanisms (FTMs). The aim
of the validation is to verify that the system and/or its built-in
FTMs accomplish the design specifications in presence of faults.
VHDL-BASED FAULT INJECTION TECHNIQUES
Fault Injection Using Simulator Commands
This fault injection technique is based on using the commands
of the simulator at simulation time, in order to modify the value
or timing of the signals and variables of the model [24]. Moreover,
as VHDL generic constants are managed as special variables,
it is possible to inject some non-usual fault models, such
as delay faults [8].
Using simulator commands it is possible to inject transient,
permanent, and intermittent faults. Though, there exists one restriction:
due to the special nature of variables in VHDL, it is
not possible to inject permanent faults in variables.
This technique is the easiest one to implement and its temporal
cost (to perform the simulation) is by far the lowest. However,
the number of fault models that can be injected is smaller
than with the other techniques.
FAULT INJECTION ENVIRONMENT
The GSTF has developed a fault injection tool called VFIT
(VHDL-based fault injection tool) [22], [23], that runs on PC
computers (or compatible) under Windows and is model-independent.
Although it admits models at any abstraction level, it
has been mainly used on models at gate and RT levels.
With VFIT it is possible to inject faults automatically applying
the simulator commands technique. It is also feasible to
inject faults using saboteurs and mutants, but in this case, the
injection process needs the intervention of the user because the
insertion of the saboteurs and the generation of mutants are not
automatic.
CONCLUSION
In this paper, new methods to implement and use saboteurs
and mutants into VHDL models in an automatic way have been
proposed.
The new models of saboteurs fix some problems of ambiguity
that the previous approach had. These problems prevented their
automatic insertion. Moreover, the new models have been implemented
in such a way that they diminish the overhead, by reducing
the number of signals required to manage bidirectional
saboteurs. Another enhancement respect to prior models is that
they allow to inject more fault models. The numeric results of
comparing both proposals do not reflect these improvements. Instead,
a slight temporal overhead has been introduced. Anyway,
the overall temporal cost (the sum of simulation and analysis
times) of this technique is affordable with modern computers.