07-08-2012, 01:22 PM
I2C BASED SECURITY CODE LOCKS
[attachment=30365]
Aim:
The aim of the project is to build a I2C Based Security Code Locks.
Scope:
Now a day the security systems place an important role for all organizations. Through these systems we can protect our required data and it can allow only the registered users so, no possibility of miss passing the data.
In this project, the lock has a keypad for entering combinations, a random access memory (RAM) into which the entered data is loaded, a microprocessor, and an electrically erasable programmable read only memory (EEPROM). One or more entry codes for Opening the lock are stored in the EEPROM and loaded into the RAM when the lock is powered-up. To open the lock, one of these codes or a master entry code must be entered at the keypad. Each entry code can be individually prevented from opening the lock by entering a corresponding individual lock-out code. All these entered lock codes are compared with the stored lock codes which are already stored in EEPROM. If it wills matches the entry will be accepted. This system is works only for our specified EEPROM
memory. When replaces that EEPROM with another one it can’t work. The data transmission from EEPROM to controller is done through I2C (inter integrated circuit).
I2C is one of the best embedded communication interfaces. It is allow easy Communication between components which reside on the same circuit board. To connect two ICs on circuit board. The I2C-bus has 2-wire interface architecture. Those are SDL (Serial Data Line) and SCL (Serial Clock Line). SDL is responsible for transmission and reception of data. Master only gives the clock pulses those clock pulses are nothing but SCL. When, SDA = 0, SCL = 1. It indicates that, now we can start of transfer. When, SDA = 1, SCL = 0. It indicates that, end of transfer of data.
Each device connected to the bus is software addressable by a unique address and simple master/slave relationships exist at all times. . Each device is of 10-bit or 7-bit address. Masters can operate as master-transmitters or as master-receivers. It is a true multi-master bus including collision detection. The transmission speed is 100kbits/sec.
SOFTWARES:
1) Keil Compiler
2) Express PCB/ORCAD
Hardware:
1) Micro Controller.
2) EEPROM
3) I2C bus
4) Power supply
[attachment=30365]
Aim:
The aim of the project is to build a I2C Based Security Code Locks.
Scope:
Now a day the security systems place an important role for all organizations. Through these systems we can protect our required data and it can allow only the registered users so, no possibility of miss passing the data.
In this project, the lock has a keypad for entering combinations, a random access memory (RAM) into which the entered data is loaded, a microprocessor, and an electrically erasable programmable read only memory (EEPROM). One or more entry codes for Opening the lock are stored in the EEPROM and loaded into the RAM when the lock is powered-up. To open the lock, one of these codes or a master entry code must be entered at the keypad. Each entry code can be individually prevented from opening the lock by entering a corresponding individual lock-out code. All these entered lock codes are compared with the stored lock codes which are already stored in EEPROM. If it wills matches the entry will be accepted. This system is works only for our specified EEPROM
memory. When replaces that EEPROM with another one it can’t work. The data transmission from EEPROM to controller is done through I2C (inter integrated circuit).
I2C is one of the best embedded communication interfaces. It is allow easy Communication between components which reside on the same circuit board. To connect two ICs on circuit board. The I2C-bus has 2-wire interface architecture. Those are SDL (Serial Data Line) and SCL (Serial Clock Line). SDL is responsible for transmission and reception of data. Master only gives the clock pulses those clock pulses are nothing but SCL. When, SDA = 0, SCL = 1. It indicates that, now we can start of transfer. When, SDA = 1, SCL = 0. It indicates that, end of transfer of data.
Each device connected to the bus is software addressable by a unique address and simple master/slave relationships exist at all times. . Each device is of 10-bit or 7-bit address. Masters can operate as master-transmitters or as master-receivers. It is a true multi-master bus including collision detection. The transmission speed is 100kbits/sec.
SOFTWARES:
1) Keil Compiler
2) Express PCB/ORCAD
Hardware:
1) Micro Controller.
2) EEPROM
3) I2C bus
4) Power supply