08-08-2012, 11:43 AM
DESIGN AND IMPLEMENTATION OF UART USING VHDL
Description:
This UART (Universal Asynchronous Receiver Transmitter) is designed to make an interface between a RS232 line and a microcontroller, or an IP core. It works fine connected to the serial port of a PC for data exchange with custom electronic. It integrates two separate clocks, one for wishbone bus, and the other for bit stream generation. This has the advantage to let the user bring his own desired frequency for the baud rate. This Design coding, Simulation, Logic Synthesis and Implemented will be done using various EDA tools.
Description:
This UART (Universal Asynchronous Receiver Transmitter) is designed to make an interface between a RS232 line and a microcontroller, or an IP core. It works fine connected to the serial port of a PC for data exchange with custom electronic. It integrates two separate clocks, one for wishbone bus, and the other for bit stream generation. This has the advantage to let the user bring his own desired frequency for the baud rate. This Design coding, Simulation, Logic Synthesis and Implemented will be done using various EDA tools.