09-08-2012, 04:38 PM
Review of memory basics
[attachment=30840]
Every computer system contains a variety of devices to store the instructions and data required for its operation. These storage devices plus the algorithms needed to control or manage the stored information constitute the memory system of the computer. In general, it is desirable that processors should have immediate and interrupted access to memory, so the time required to transfer information between the processor and memory should be such that the processor can operate at, close to, its maximum speed. Unfortunately, memories that operate at speeds comparable to processors speed are very costly. It is not feasible to employ a single memory using just one type of technology. Instead the stored information is distributed in complex fashion over a variety of different memory units with very different physical characteristics.
Memory device characteristics
The computer architect is faced with a bewildering variety of memory devices to use.However; all memories are based on a relatively small number of physical phenomena and employ relatively few organizational principles. The characteristics and the underlying physical principles of some specific representative technologies are also discussed.
Cost:
The cost of a memory unit is almost meaningfully measured by the purchase or lease price to the user of the complete unit. The price should include not only the cost of the information storage cells themselves but also the cost of the peripheral equipment or access circuitry essential to the operation of the memory.
Access time and access rate:
The performance of a memory device is primarily determined by the rate at which information can be read from or written into the memory. A convenient performance measure is the average time required to read a fixed amount of information from the memory. This is termed read access time. The write access time is defined similarly; it is typically but not always equal to the read access time. Access time depends on the physical characteristics of the storage medium, and also on the type of access mechanism used. It is usually calculated from the time a read request is received by the memory and to the time at which all the requested information has been made available at the memory output terminals. The access rate of the memory is defined is the inverse of the access time.
Clearly low cost and high access rate are desirable memory characteristics; unfortunately they appear to be largely compatible. Memory units with high access rates are generally expensive, while low cost memory are relatively slow.
Access mode-random and serial:
An important property of a memory device is the order or sequence in which information can be accessed. If locations may be accessed in any order and the access time is independent of the location being accessed, the memory is termed as a random access memory.
Ferrite core memory and semiconductor memory are usually of this type. Memories where storage locations can be accessed only in a certain predetermined sequence are called serial access memories. Magnetic tape units and magnetic bubble memories employ serial access methods.
In a random access memory each storage location can be accessed independently of the other locations. There is, in effect, a separate access mechanism, or read-write, for every location. In serial memories, on the other hand, the access mechanism is shared among different locations. It must be assigned to different locations at different times. This is accomplished by moving the stored information ,the read write head or both. Many serial access memories operate by continually moving the storage locations around a closed path or track. A particular location can be accessed only when it passes the fixed read write head; thus the time required to access a particular location depends on the relative location of the read/write head when the access request is received.
Cycle time and data transfer rate:
The access time of a memory is defined as the time between the receipt of a read request and the delivery of the requested information to its external output terminals. In DRO and dynamic memories, it may not be possible to initiate another memory access until a restore or refresh operation has been carried out. This means that the minimum time that must elapse between the initiations of two different accesses by the memory can be greater than the access time: this rather loosely defined time is called the cycle time of the memory.
Random access memory
Random access memories are characterized by the fact that every location can be accessed independently. The access time and the cycle time are constant independent of the position. Figure below gives the main components of a random access unit. The storage cell unit comprises N cells each of which can store one bit of information. The memory operates as follows. The address of the required location is transferred via the address bus to the memory address register . The address is then processed by the address decoder which selects the required location in the storage cell unit. A read-write select control line specifies the type of access to be performed. If read is requested, the contents of the selected location is transferred to the output data register. If write is requested, the word to be written is first placed in the memory input data register and then transferred to the selected cell. Since it is not usually desirable to permit simultaneous reading and writing, the input and the output data registers are frequently combined to form a single data register.
[attachment=30840]
Every computer system contains a variety of devices to store the instructions and data required for its operation. These storage devices plus the algorithms needed to control or manage the stored information constitute the memory system of the computer. In general, it is desirable that processors should have immediate and interrupted access to memory, so the time required to transfer information between the processor and memory should be such that the processor can operate at, close to, its maximum speed. Unfortunately, memories that operate at speeds comparable to processors speed are very costly. It is not feasible to employ a single memory using just one type of technology. Instead the stored information is distributed in complex fashion over a variety of different memory units with very different physical characteristics.
Memory device characteristics
The computer architect is faced with a bewildering variety of memory devices to use.However; all memories are based on a relatively small number of physical phenomena and employ relatively few organizational principles. The characteristics and the underlying physical principles of some specific representative technologies are also discussed.
Cost:
The cost of a memory unit is almost meaningfully measured by the purchase or lease price to the user of the complete unit. The price should include not only the cost of the information storage cells themselves but also the cost of the peripheral equipment or access circuitry essential to the operation of the memory.
Access time and access rate:
The performance of a memory device is primarily determined by the rate at which information can be read from or written into the memory. A convenient performance measure is the average time required to read a fixed amount of information from the memory. This is termed read access time. The write access time is defined similarly; it is typically but not always equal to the read access time. Access time depends on the physical characteristics of the storage medium, and also on the type of access mechanism used. It is usually calculated from the time a read request is received by the memory and to the time at which all the requested information has been made available at the memory output terminals. The access rate of the memory is defined is the inverse of the access time.
Clearly low cost and high access rate are desirable memory characteristics; unfortunately they appear to be largely compatible. Memory units with high access rates are generally expensive, while low cost memory are relatively slow.
Access mode-random and serial:
An important property of a memory device is the order or sequence in which information can be accessed. If locations may be accessed in any order and the access time is independent of the location being accessed, the memory is termed as a random access memory.
Ferrite core memory and semiconductor memory are usually of this type. Memories where storage locations can be accessed only in a certain predetermined sequence are called serial access memories. Magnetic tape units and magnetic bubble memories employ serial access methods.
In a random access memory each storage location can be accessed independently of the other locations. There is, in effect, a separate access mechanism, or read-write, for every location. In serial memories, on the other hand, the access mechanism is shared among different locations. It must be assigned to different locations at different times. This is accomplished by moving the stored information ,the read write head or both. Many serial access memories operate by continually moving the storage locations around a closed path or track. A particular location can be accessed only when it passes the fixed read write head; thus the time required to access a particular location depends on the relative location of the read/write head when the access request is received.
Cycle time and data transfer rate:
The access time of a memory is defined as the time between the receipt of a read request and the delivery of the requested information to its external output terminals. In DRO and dynamic memories, it may not be possible to initiate another memory access until a restore or refresh operation has been carried out. This means that the minimum time that must elapse between the initiations of two different accesses by the memory can be greater than the access time: this rather loosely defined time is called the cycle time of the memory.
Random access memory
Random access memories are characterized by the fact that every location can be accessed independently. The access time and the cycle time are constant independent of the position. Figure below gives the main components of a random access unit. The storage cell unit comprises N cells each of which can store one bit of information. The memory operates as follows. The address of the required location is transferred via the address bus to the memory address register . The address is then processed by the address decoder which selects the required location in the storage cell unit. A read-write select control line specifies the type of access to be performed. If read is requested, the contents of the selected location is transferred to the output data register. If write is requested, the word to be written is first placed in the memory input data register and then transferred to the selected cell. Since it is not usually desirable to permit simultaneous reading and writing, the input and the output data registers are frequently combined to form a single data register.