27-08-2012, 11:01 AM
N/MEMS Design Methodologies
[attachment=32796]
N/MEMS Design Today
As the N/MEMS industry matures, the design challenge continues to
move from the microstructure design to the microsystem design. With
the maturity of the process technology and the increase in computing
power, designers are now looking to optimize MEMS from a system
standpoint. Traditional N/MEMS CAD tools provide functionality to
design at a microstructure level.
Today MEMS modeling and simulation is performed at various levels of
granularity by MEMS engineers working on different aspects of the
manufacture. Ab initio models are based upon atomistic, quantum
mechanical or molecular dynamics. Such models are typically used in
process modeling to predict material behavior (such as physical
properties or etch behavior). Component level models can include
lumped models and finite element representations of a component
such as a plate or a comb drive. Device models represent the working
of the micro or nanostructure under investigation. Algorithmic models
are used to capture the behavior of a certain logic or control element
within a system. Finally, system level models are used to model the
entire microsystem.
Technology CAD (TCAD)
At this level, the microstructure is simulated at the process level.
Simulators such as AnisE™ and RECIPE™ from IntelliSense and
SUPREM™-based simulators from various vendors simulate the actual
process flow based upon process settings and physical simulation of
the process, such as diffusion, growth or etching. TCAD-based models
are typically set up and run by process engineers.
These simulations are useful in understanding the effect of the process
on the final physical geometry of the device. Since they are based on
the actual physical models, they are often very time-consuming. For
instance, IntelliSense’s RIE/ICP simulation tool RECIPE is based on the
actual simulation of the plasma etching process and polymer
deposition process. These tools are used to determine the influence of
the process and mask set on the final geometry of the device.
Verification
Verification in MEMS is quite different from that in the IC world. The IC
world typically uses Layout vs. Schematic (LVS) and Design Rule Check
(DRC) techniques. While Design Rule Checks can be used in the MEMS
world, support for curves, beziers, and all-angle geometries are
needed. LVS provides little benefit to the MEMS designer due to the
inherent 3D nature of the design.
Schematic vs 3D comparisons (SV3D) are needed to make sure that
the schematic capture has been accurately translated into a 3D design.
In MEMS design, verification is the process of comparing the results
from the schematic-based model (top-down approach) with the
results of the 3D-based approach (bottom-up approach). This typically
involves benchmarking the schematic, 3D finite element and ROM
results.
System simulation
Accurate system simulation can be performed using ROMs described
in the previous section. However, compact models are not easily
parameterized. While the process of creating a large number of
compact models can be automated, it is time-consuming.
Another alternative is to use lumped parameter models. However,
these models do not take into account process-related effects such as
axial residual stresses, strain gradients, temperature coefficient issues,
physical issues such as joule heating, squeeze film and Couette
damping or package-level effects of die attach, plastic over-molding
and non-uniform heating.
The designer is often faced with the choice of using low-fidelity
lumped models which can be parameterized, or high-fidelity nonparameterized
compact models. This makes the design optimization
from a system standpoint a challenge.
[attachment=32796]
N/MEMS Design Today
As the N/MEMS industry matures, the design challenge continues to
move from the microstructure design to the microsystem design. With
the maturity of the process technology and the increase in computing
power, designers are now looking to optimize MEMS from a system
standpoint. Traditional N/MEMS CAD tools provide functionality to
design at a microstructure level.
Today MEMS modeling and simulation is performed at various levels of
granularity by MEMS engineers working on different aspects of the
manufacture. Ab initio models are based upon atomistic, quantum
mechanical or molecular dynamics. Such models are typically used in
process modeling to predict material behavior (such as physical
properties or etch behavior). Component level models can include
lumped models and finite element representations of a component
such as a plate or a comb drive. Device models represent the working
of the micro or nanostructure under investigation. Algorithmic models
are used to capture the behavior of a certain logic or control element
within a system. Finally, system level models are used to model the
entire microsystem.
Technology CAD (TCAD)
At this level, the microstructure is simulated at the process level.
Simulators such as AnisE™ and RECIPE™ from IntelliSense and
SUPREM™-based simulators from various vendors simulate the actual
process flow based upon process settings and physical simulation of
the process, such as diffusion, growth or etching. TCAD-based models
are typically set up and run by process engineers.
These simulations are useful in understanding the effect of the process
on the final physical geometry of the device. Since they are based on
the actual physical models, they are often very time-consuming. For
instance, IntelliSense’s RIE/ICP simulation tool RECIPE is based on the
actual simulation of the plasma etching process and polymer
deposition process. These tools are used to determine the influence of
the process and mask set on the final geometry of the device.
Verification
Verification in MEMS is quite different from that in the IC world. The IC
world typically uses Layout vs. Schematic (LVS) and Design Rule Check
(DRC) techniques. While Design Rule Checks can be used in the MEMS
world, support for curves, beziers, and all-angle geometries are
needed. LVS provides little benefit to the MEMS designer due to the
inherent 3D nature of the design.
Schematic vs 3D comparisons (SV3D) are needed to make sure that
the schematic capture has been accurately translated into a 3D design.
In MEMS design, verification is the process of comparing the results
from the schematic-based model (top-down approach) with the
results of the 3D-based approach (bottom-up approach). This typically
involves benchmarking the schematic, 3D finite element and ROM
results.
System simulation
Accurate system simulation can be performed using ROMs described
in the previous section. However, compact models are not easily
parameterized. While the process of creating a large number of
compact models can be automated, it is time-consuming.
Another alternative is to use lumped parameter models. However,
these models do not take into account process-related effects such as
axial residual stresses, strain gradients, temperature coefficient issues,
physical issues such as joule heating, squeeze film and Couette
damping or package-level effects of die attach, plastic over-molding
and non-uniform heating.
The designer is often faced with the choice of using low-fidelity
lumped models which can be parameterized, or high-fidelity nonparameterized
compact models. This makes the design optimization
from a system standpoint a challenge.