17-09-2012, 02:32 PM
Feed back biasing in nano scale CMOS technologies
[attachment=33852]
INTRODUCTION
CMOS integrated-circuit technology growth is encouraged by the demand for decrease in cost per performance of digital processing . Each technology generation comes with its set of advantages and limitations. Nanoscale CMOS technologies are suitable for applications that demand smaller and faster transistors or, in other words, where very high frequency operation is required with very small parasitic capacitances. However, scaled-down technologies introduce limitations, such as low voltage headroom, low output resistance of transistors, and low accuracy in terms of matching and noise. Another characteristic of CMOS technologies is that the MOSFET threshold voltage does not scale proportionally to the power supply voltage as the technology generation ie minimum gate length changes. As a matter of fact, the threshold voltage reduces at a lower rate, compared with the power supply voltage, as one moves to newer technology generations .This is usually not good news for an analog designer, as it becomes difficult to design amplifiers having high-enough gain particularly because performance enhancement techniques such as cascoding cannot be used without sacrificing most of the headroom.
ANALYSIS
The circuit shown in Fig. 1(a) can be recognized as a simple transimpedance configuration with feedback resistor RG. If the feedback resistor is very large, then the loop gain response
of this amplifier can be designed to decay at low-enough frequencies such that the amplifier operates effectively in open loop at high frequencies, as mentioned in (2).
For analysis, the circuit can be redrawn to include other important impedances, as shown in Fig. 2.
Additional devices shown in Fig. 2(a) are CL, which is the capacitive load at the output of the amplifier; CG, which consists primarily of the gate–drain capacitance of the MOSFET; and CIN, which comprises dc block capacitance CD, as shown in Fig. 1(b), and the gate–source capacitance of the MOSFET.
A PRACTICAL CIRCUIT
Fig.3 shows common-source (CS) amplifiers with two identical stages “a” and “b.” Using feedback biasing designed for application in a capacitive-micromachined-ultrasonic-transducer (CMUT)-based intravenous imaging system. Due to the requirement of having an array of several transducers with local signal conditioning on a catheter tip for performing imaging inside the human arteries, the compactness of the circuitry is of utmost importance, followed by the constraint on the power consumption of the system. It is for this reason that a CS amplifier topology is being investigated for this application, as the CS amplifier is one of the most efficient amplifier stages that can be realized in CMOS technology.
CONCLUSION
Feedback biasing is an efficient method to get high gain with minimum area overhead. The classic disadvantage, limited voltage swing, vanishes as one move to nanoscale technologies. High gain stability can be achieved using feedback biasing
[attachment=33852]
INTRODUCTION
CMOS integrated-circuit technology growth is encouraged by the demand for decrease in cost per performance of digital processing . Each technology generation comes with its set of advantages and limitations. Nanoscale CMOS technologies are suitable for applications that demand smaller and faster transistors or, in other words, where very high frequency operation is required with very small parasitic capacitances. However, scaled-down technologies introduce limitations, such as low voltage headroom, low output resistance of transistors, and low accuracy in terms of matching and noise. Another characteristic of CMOS technologies is that the MOSFET threshold voltage does not scale proportionally to the power supply voltage as the technology generation ie minimum gate length changes. As a matter of fact, the threshold voltage reduces at a lower rate, compared with the power supply voltage, as one moves to newer technology generations .This is usually not good news for an analog designer, as it becomes difficult to design amplifiers having high-enough gain particularly because performance enhancement techniques such as cascoding cannot be used without sacrificing most of the headroom.
ANALYSIS
The circuit shown in Fig. 1(a) can be recognized as a simple transimpedance configuration with feedback resistor RG. If the feedback resistor is very large, then the loop gain response
of this amplifier can be designed to decay at low-enough frequencies such that the amplifier operates effectively in open loop at high frequencies, as mentioned in (2).
For analysis, the circuit can be redrawn to include other important impedances, as shown in Fig. 2.
Additional devices shown in Fig. 2(a) are CL, which is the capacitive load at the output of the amplifier; CG, which consists primarily of the gate–drain capacitance of the MOSFET; and CIN, which comprises dc block capacitance CD, as shown in Fig. 1(b), and the gate–source capacitance of the MOSFET.
A PRACTICAL CIRCUIT
Fig.3 shows common-source (CS) amplifiers with two identical stages “a” and “b.” Using feedback biasing designed for application in a capacitive-micromachined-ultrasonic-transducer (CMUT)-based intravenous imaging system. Due to the requirement of having an array of several transducers with local signal conditioning on a catheter tip for performing imaging inside the human arteries, the compactness of the circuitry is of utmost importance, followed by the constraint on the power consumption of the system. It is for this reason that a CS amplifier topology is being investigated for this application, as the CS amplifier is one of the most efficient amplifier stages that can be realized in CMOS technology.
CONCLUSION
Feedback biasing is an efficient method to get high gain with minimum area overhead. The classic disadvantage, limited voltage swing, vanishes as one move to nanoscale technologies. High gain stability can be achieved using feedback biasing