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MIPS Architecture

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Introduction

The first Multiple instruction setarchitecture (MIPS) under the supervision of john L Hennessy atStanford University before 20 years ago.MIPS architecture similar to the recent CPU design like IBM,Motorola and ARM Based processors.The first architecture was 32-bit and later versions or architectures were 64 bit. There are multiple versions of multiple instruction set architecture instruction set are available one of most important are
1. MIPS32
2. MIPS64
The most frequently used architecture are MIPS32 architecture (for 32-bit implementations) and MIPS64 architecture (for 64-bit implementations).These architecture are define the instruction set and other a control register set.
MIPS architecture are used in silicon graphics pc and servers. Different kinds of CISCO Routers and game machines SonyPlayStation 2, PlayStation portable.
MIPS architecture Design for pipelining efficiency and Efficiency as a compiler target.

Registers use in MIPS architecture

• Basically MIPS use 32 64-bit general-purpose registers (for GPRs).
• These register are from R0,R1-------------R31.
• Integer register are also known as general purpose registers.
• Use 32 64-bit floating-point registers (for FPRs)
• These register are from F0,F1-------------F31.
• Both use single and double-precision instructions

MIPS Instruction Format

MIPS instructon format are classified into 5 major classes
1. Arithmeticinstruction, logical instruction and comparison instruction etc.
2. Branch and jump instruction (control instruction for data flow).
3. Load and store instruction.
4. Other instruction is register movements exceptions etc.
5. Floating point and operations.

LOAD AND STORE INSTRUCTION

Both two formatsGPR or FPRs any of two loaded and store except R0 which keep always zero and Conversions between single and double precision must be done explicitly.
Mips architecture r2000 is a load and store architecture.
These are the only instruction which use to access memory to get operands are load and store instructions.
The first operands are in register mode and the second operands base displacement mode.