10-10-2012, 01:40 PM
8051 Microprocessor & Microcontroller
[attachment=35926]
IMPORTANT 8051 FEATURES
4K bytes ROM
128 bytes RAM
Four 8-bit I/O ports
Two 16-bit timers
Serial interface
64K external code memory space
64K data memory space
Register Banks
4 Register Banks — Bank0, Bank1, Bank2 and Bank3
Each Bank consists of — R0, R1, R2, R3, R4, R5, R6, R7
Bank 0 is the default upon power up of the microcontroller
Other banks can be selected by programming PSW register.
Bit-Addressable RAM
The 8051 contains 210 bit-addressable locations of which 128 are at byte address 20H through 2FH
This is the powerful feature of most microcontroller because individual bits can be set, cleared, ANDed, ORed etc. with a single instruction instead of having to read a byte and modify
Accessing External RAM
For designs with external RAM, a typical connection.Note the control lines that must be used.
MOVX instruction is used to indicate that the external RAM is involved.
e.g. MOVX A, @dptr ( a read operation)
e.g. MOVX @dptr, A (a write operation)
I/O Port Structure
The internal circuitry for the I/O port is shown in fig 2-4.
If you want to read in from a pin, you must first give a logic ‘1’ to the port latch to turn off the FET otherwise the data read in will always be logic ‘0’.
When you write to the port you are actually writing to the latch e.g. a logic 0 given to the latch will be inverted and turn on the FET which cause the port pin to be connected to gnd (logic 0).
[attachment=35926]
IMPORTANT 8051 FEATURES
4K bytes ROM
128 bytes RAM
Four 8-bit I/O ports
Two 16-bit timers
Serial interface
64K external code memory space
64K data memory space
Register Banks
4 Register Banks — Bank0, Bank1, Bank2 and Bank3
Each Bank consists of — R0, R1, R2, R3, R4, R5, R6, R7
Bank 0 is the default upon power up of the microcontroller
Other banks can be selected by programming PSW register.
Bit-Addressable RAM
The 8051 contains 210 bit-addressable locations of which 128 are at byte address 20H through 2FH
This is the powerful feature of most microcontroller because individual bits can be set, cleared, ANDed, ORed etc. with a single instruction instead of having to read a byte and modify
Accessing External RAM
For designs with external RAM, a typical connection.Note the control lines that must be used.
MOVX instruction is used to indicate that the external RAM is involved.
e.g. MOVX A, @dptr ( a read operation)
e.g. MOVX @dptr, A (a write operation)
I/O Port Structure
The internal circuitry for the I/O port is shown in fig 2-4.
If you want to read in from a pin, you must first give a logic ‘1’ to the port latch to turn off the FET otherwise the data read in will always be logic ‘0’.
When you write to the port you are actually writing to the latch e.g. a logic 0 given to the latch will be inverted and turn on the FET which cause the port pin to be connected to gnd (logic 0).