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EMBEDDED SYSTEM AND EMBEDDED VLSI(ESEV)


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ABSTRACT

Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistors into a single chip. VLSI began in the 1970s when complex semiconductor and communication technologies were being developed. Subsequent advances added more and more transistors, and, as a consequence, more individual functions or systems were integrated over time. The first integrated circuits held only a few devices, perhaps as many as ten diodes, transistors, resistors and capacitors, making it possible to fabricate one or more logic gates on a single device. Now known retrospectively as small-scale integration (SSI), improvements in technique led to devices with hundreds of logic gates, known as medium-scale integration (MSI). Further improvements led to large-scale integration (LSI), i.e. systems with at least a thousand logic gates. Current technology has moved far past this mark and today's microprocessors have many millions of gates and billions of individual transistors.
Here are some VLSI Tools that I have learnt and used during this summer training for designing, simulating, implementing and verifying of electronic circuits. Those are PSPICE, XILINX, VHDL and TANNER.

INTRODUCTION

Embedded means “hidden inside”.
A microprocessor is a multipurpose, programmable, clock driven, register based electronic device that reads binary instructions from memory, accepts binary data as input and processes data according to those instructions and provides results as output. A microprocessor incorporates most or all of the computer’s central processing unit on a single chip.
An Application-Specific Integrated Circuit (ASIC) is an integrated circuit (IC) customized for a particular use, rather than intended for general-purpose use. For example, a chip designed solely to run a cell phone is an ASIC. In our case we are going to design the keyboard interface for the pre designed asic microprocessor.
The microprocessor is designed using the Reduced Instruction Set Circuit (RISC) architecture. It is built on very few instructions and using a simple structure. RISC architecture as the name suggests does not use all the instruction that could be formed.
We have designed an opcode level keyboard for this microprocessor from where the user can directly pass the required program to the memory and execute it. Our keyboard design is made in 4 modules. After combining all the modules we have integrated all the components. The timing synchronization and proper execution has been handled by us. All this has been programmed using Xilinx ISE 9.2i. and tested on spartan 3e fpga board.

Register

These are used for temporary data storage during execution of an instruction and also general purpose data storage. These are connected to the internal bus of microprocessor by two control signals in and out. The architecture of registers consists of memory cells generally d-flip flops combine in a parallel or pipo manner to the internal data bus. The input data is controlled by a gating structure with a multiplexer of 8 lines.
The multiplexer selects one of two input operands out of which one is the feedback from the register’s output and the other is connected to the microprocessor’s internal bus. The output of register is controlled by a tri-state buffer. When the control signal of buffer is high output is flowed to the internal bus of microprocessor. When the control signal is low or zero then output is also zero. The architecture of register along with its control unit is shown in figure below. [1]

XILINX ISE 9.2I

This chapter describes the programming and simulation tool Xilinx ISE 9.2i. We have also described the flow using SR Latch as an example.

Introduction

The Design Manager is the top-level software module in the Xilinx ISE Development System. The use the Xilinx ISE tool suites for implementing a design into a Xilinx Field Programmable Gate Array (FPGA) or Complex Programmable Logic Device (CPLD). The Xilinx ISE9.2i system is a development tool that consists of an integrated set of software and hardware tools to create simulate and implement digital designs in a FPGA or CPLD. All the tools use a graphical user interface (GUI) that allows all programs to be executed from toolbars, menus or icons.
Xilinx ISE has done in ASIC world the greatest things, by introducing the downloadable boards which has decreased the time from design to market a great deal. Xilinx is the market leader in the Field programmable Gate Array (FPGA) and Complex (configurable) Programmable Logic Devices. With these boards the practicality of a design is tested without investing a lot of money and time and also helps in the re-usage of resources. [7]

Logic Functional Description of FPGA (Spartan)

The Spartan Series uses a standard FPGA structure. The FPGA consists of an array of configurable logic blocks (CLBs) placed in a matrix of routing channels. The input and output of signals is achieved through a set of input/output blocks (IOBs) forming a ring around the CLBs and routing channels.
• CLBs provide the functional elements for implementing the user’s logic.
• IOBs provide the interface between the package pins and internal signal lines.
• Routing channels provide paths to interconnect the inputs and outputs of the CLBs and IOBs.
• The functionality of each circuit block is customized during configuration by programming internal static memory cells.
• The values stored in these memory cells determine the logic functions and interconnections implemented in the FPGA.

Configurable Logic Blocks (CLBs) of Spartan

The CLBs are used to implement most of the logic in an FPGA. There are three look-up tables (LUT) which are used as logic function generators, two flip-flops and two groups of signal steering multiplexers. It may also contain a microprocessor, memory blocks. Two of the LUTs are of 4 input function generators, while the other is a three input function generator. The three LUTs in the CLB can also be combined to do any arbitrarily defined Boolean function of five inputs.

THINGS ADDED TO THE MICROPROCESSOR

The initial version of the microprocessor has a number of constrains which restricted the use of the microprocessor to a very small scale we have tried to remove these constraints and make the micro process more user friendly and increase its applicability. Here is a list of the work we have done to enhance the microprocessor:
1. Addition of flag register: the previously designed microprocessor didn’t had a flag so we were restricted to do a very small number or programs which does not requires these register ,the data over flow can’t be detected now all these anomalies have been removed.
2. Enhancement of the ALU: The alu of the microprocessor has also been expanded to execute functions like rotating the data in both the direction as per user requirement ,shifting the data in both direction additional mathematical operation multiplication and division is also possible directly .a number of new instructions can be added using these features.
3. Addition of port: No ports were available earlier to interface an input/output device to the microprocessor or to drive a load using the microprocessor. We have added four input and four output port for this purpose.
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