07-11-2012, 06:16 PM
BIPOLAR DIGITAL DESIGN
[attachment=38520]
Introduction
MOS transistors took over the digital integrated circuit market in the 1970s, mainly as a
consequence of their high integration density. Before that time, most digital gates were
implemented in the bipolar technology. The dominance of the bipolar approach to digital
design was exemplified in the wildly and widely successful TTL (Transistor-Transistor
Logic) logic series, which persisted until the late 1980s. Bipolar digital designs occupy
only a small portion of the digital market today. They still are the technology of choice
when very high performance is required, yet even there CMOS is becoming highly competitive.
This trend will continue in the future, as the reduced supply voltages of the deepsubmicron
technologies make bipolar design exceedingly hard.
Because of this reduced importance, we decided to remove bipolar design from the
2nd Edition of “Digital Integrated Circuits — A Design Perspective”, and to make the
material of the 1st edition freely available at the web-site as a set of addenda. We hope that
this helps to address the concerns of those designers for whom bipolar design is still a
necessity.
In this addendum, we first present a brief overview of the bipolar device and its
models. This is followed by an extensive description and analysis of the Emitter-Coupled
Logic (ECL) gate, the dominant bipolar digital gate at present. After a discussion on how
to build complex logic gates in ECL, the chapter is concluded with an overview of the
BICMOS approach to digital design that combines MOS and bipolar devices into a single
gate.
A First Glance at the Device
a cross section of a typical npn bipolar (junction) transistor structure.
The heart of the transistor is the region between the dashed lines and consists of two np
junctions, connected back to back. In the following analysis, we will consider the idealized
transistor structure of Figure A.1b. The transistor is a three-terminal device, where
the two n-regions, called the emitter and the collector, sandwich the p-type base region. In
contrast to the source and drain regions of the MOSFET, the emitter and collector regions
are not interchangeable, as the emitter is much more heavily doped than the collector.
Forward-Active Region
Figure A.3 shows a cross section of the idealized transistor structure of Figure A.1b as
well as the minority carrier concentrations in the emitter, base, and collector regions. The
concentrations are plotted for the forward-active operation mode. That is, the base-emitter
(be) junction is forward-biased, while the base-collector (bc) junction is in reverse-bias
condition. The subscripts e, b, and c are used to denote the various regions. As we know
from our diode study, the forward bias causes excess minority carriers on the be side,
while the reverse bias at the bc end causes the minority concentration to approach zero.
We assume (without loss of generality) that the short-base diode model is valid for all
junctions.
Depending upon the voltages applied over the device terminals, the emitter-base and
collector-base junctions are in the forward- or reverse-biased condition. Enumeration of
all possible combinations results in Table A.1, which summarizes the operation modes of
the bipolar device. In digital circuits, the transistor is operated by preference in the cut-off
or forward-active mode. Operation in the saturation or reverse regions is, in general,
avoided as the circuit performance in those regions tends to deteriorate.
In a superficial way, the operation of the device can be summarized as follows:
• As both junctions are reverse biased in the cut-off mode, no current flows into or out
of the device. It can be considered off.
[attachment=38520]
Introduction
MOS transistors took over the digital integrated circuit market in the 1970s, mainly as a
consequence of their high integration density. Before that time, most digital gates were
implemented in the bipolar technology. The dominance of the bipolar approach to digital
design was exemplified in the wildly and widely successful TTL (Transistor-Transistor
Logic) logic series, which persisted until the late 1980s. Bipolar digital designs occupy
only a small portion of the digital market today. They still are the technology of choice
when very high performance is required, yet even there CMOS is becoming highly competitive.
This trend will continue in the future, as the reduced supply voltages of the deepsubmicron
technologies make bipolar design exceedingly hard.
Because of this reduced importance, we decided to remove bipolar design from the
2nd Edition of “Digital Integrated Circuits — A Design Perspective”, and to make the
material of the 1st edition freely available at the web-site as a set of addenda. We hope that
this helps to address the concerns of those designers for whom bipolar design is still a
necessity.
In this addendum, we first present a brief overview of the bipolar device and its
models. This is followed by an extensive description and analysis of the Emitter-Coupled
Logic (ECL) gate, the dominant bipolar digital gate at present. After a discussion on how
to build complex logic gates in ECL, the chapter is concluded with an overview of the
BICMOS approach to digital design that combines MOS and bipolar devices into a single
gate.
A First Glance at the Device
a cross section of a typical npn bipolar (junction) transistor structure.
The heart of the transistor is the region between the dashed lines and consists of two np
junctions, connected back to back. In the following analysis, we will consider the idealized
transistor structure of Figure A.1b. The transistor is a three-terminal device, where
the two n-regions, called the emitter and the collector, sandwich the p-type base region. In
contrast to the source and drain regions of the MOSFET, the emitter and collector regions
are not interchangeable, as the emitter is much more heavily doped than the collector.
Forward-Active Region
Figure A.3 shows a cross section of the idealized transistor structure of Figure A.1b as
well as the minority carrier concentrations in the emitter, base, and collector regions. The
concentrations are plotted for the forward-active operation mode. That is, the base-emitter
(be) junction is forward-biased, while the base-collector (bc) junction is in reverse-bias
condition. The subscripts e, b, and c are used to denote the various regions. As we know
from our diode study, the forward bias causes excess minority carriers on the be side,
while the reverse bias at the bc end causes the minority concentration to approach zero.
We assume (without loss of generality) that the short-base diode model is valid for all
junctions.
Depending upon the voltages applied over the device terminals, the emitter-base and
collector-base junctions are in the forward- or reverse-biased condition. Enumeration of
all possible combinations results in Table A.1, which summarizes the operation modes of
the bipolar device. In digital circuits, the transistor is operated by preference in the cut-off
or forward-active mode. Operation in the saturation or reverse regions is, in general,
avoided as the circuit performance in those regions tends to deteriorate.
In a superficial way, the operation of the device can be summarized as follows:
• As both junctions are reverse biased in the cut-off mode, no current flows into or out
of the device. It can be considered off.