10-11-2012, 06:01 PM
PIC Microcontroller
[attachment=39028]
Features of 16C6x/7x family
Family includes controllers from 16c61/62/64/71/74/710/715 etc.
They are RISCprocessors and uses Harvardarchitecture.
Different bus widths of data and program memory.Data memory is 8 bit wide where as program memory is 12,14,16 bits wide.The instruction holds immediate data along with instruction code.
PIC Architecture
ALU
Size is 8 bit
Performs operations with temporary working register and (W register) and any register file.
W register
8 bit wide. It contains one of source operands during execution of instruction and may serve as the destination for the result of operation.
Used only for ALU operations.
Data Memory
Register File Structure.
They are the memory locations that are addressed by instruction.
There is general purposeand special purposeregister file.
General purpose are 8 bit RAM locations and special purpose are I/O ports and control registers.
Timers
8 Bit wide.
Clocked internally by system clock which is Fosc/4 or by external clock on RA4/TOCKI.( Frequency 0 –50 MHz)
Incrementing. Overflows from FF-00 and generates interrupt.
2 cycle delay after prescalerfor purpose of synchronization of external with internal clock.
Timer0 delay= { [Timer0 count] x PrescalerValue x 4/Fosc}
Timer0 preload = 256 –[ Timer 0 delay x Fosc]/ Prescalevalue x 4]
[attachment=39028]
Features of 16C6x/7x family
Family includes controllers from 16c61/62/64/71/74/710/715 etc.
They are RISCprocessors and uses Harvardarchitecture.
Different bus widths of data and program memory.Data memory is 8 bit wide where as program memory is 12,14,16 bits wide.The instruction holds immediate data along with instruction code.
PIC Architecture
ALU
Size is 8 bit
Performs operations with temporary working register and (W register) and any register file.
W register
8 bit wide. It contains one of source operands during execution of instruction and may serve as the destination for the result of operation.
Used only for ALU operations.
Data Memory
Register File Structure.
They are the memory locations that are addressed by instruction.
There is general purposeand special purposeregister file.
General purpose are 8 bit RAM locations and special purpose are I/O ports and control registers.
Timers
8 Bit wide.
Clocked internally by system clock which is Fosc/4 or by external clock on RA4/TOCKI.( Frequency 0 –50 MHz)
Incrementing. Overflows from FF-00 and generates interrupt.
2 cycle delay after prescalerfor purpose of synchronization of external with internal clock.
Timer0 delay= { [Timer0 count] x PrescalerValue x 4/Fosc}
Timer0 preload = 256 –[ Timer 0 delay x Fosc]/ Prescalevalue x 4]