14-11-2012, 04:18 PM
Interfacing I/O Devices
[attachment=39450]
Interfacing I/O Devices
Using I/O devices data can be transferred between the microprocessor and the outside world.
This can be done in groups of 8 bits using the entire data bus. This is called parallel I/O.
The other method is serial I/O where one bit is transferred at a time using the SI and SO pins on the Microprocessor.
Dealing with I/O Devices
There are two ways to deal with I/O devices.
Consider them like any other memory location.
They are assigned a 16-bit address within the address range of the 8085.
The exchange of data with these devices follows the transfer of data with memory. The user uses the same instructions used for memory.
This is called memory-mapped I/O.
Treat them separately from memory:
I/O devices are assigned a “port number” within the 8-bit address range of 00H to FFH.
The user in this case would access these devices using the IN and OUT instructions only.
This is called I/O-mapped I/O or Peripheral-mapped I/O.
Basic interfacing concepts
The first step in interfacing an I/O device would be to determine which instructions will be used to access it.
If you want the user to use the IN/OUT instructions, then it should be interfaced as a peripheral-mapped I/O device.
If the user should use regular data transfer instructions (LDA, STA, etc.) then it should be interfaced as a memory-mapped I/O device.
The execution of the OUT instruction
The OUT instruction requires 3 machine cycles and 10 T-states.
The first cycle is an opcode fetch cycle to fetch the 1st byte of the instruction from memory (OUT).
The second cycle is a memory read cycle to bring the 8-bit port number from the next location.
The third cycle is an I/O write cycle.
In this cycle, the 8085 places the port number on AD0-AD7 AND A8-A15 and the signal WR is set low (active).
Since the device address is placed on both AD0-AD7 as well as A8-A15, there is no need for de-multiplexing AD0-AD7. A8-A15 can be used directly to identify the device.
The interfacing of output devices
Output devices are usually slow.
Also, the output is usually expected to continue appearing on the output device for a long period of time.
Given that the data will only be present on the data lines for a very short period (microseconds), it has to be latched externally.
To do this the external latch should be enabled when the port’s address is present on the address bus, the IO/M signal is set high and WR is set low.
The resulting signal would be active when the output device is being accessed by the microprocessor.
Decoding the address bus (for memory-mapped devices) follows the same techniques discussed in interfacing memory.
[attachment=39450]
Interfacing I/O Devices
Using I/O devices data can be transferred between the microprocessor and the outside world.
This can be done in groups of 8 bits using the entire data bus. This is called parallel I/O.
The other method is serial I/O where one bit is transferred at a time using the SI and SO pins on the Microprocessor.
Dealing with I/O Devices
There are two ways to deal with I/O devices.
Consider them like any other memory location.
They are assigned a 16-bit address within the address range of the 8085.
The exchange of data with these devices follows the transfer of data with memory. The user uses the same instructions used for memory.
This is called memory-mapped I/O.
Treat them separately from memory:
I/O devices are assigned a “port number” within the 8-bit address range of 00H to FFH.
The user in this case would access these devices using the IN and OUT instructions only.
This is called I/O-mapped I/O or Peripheral-mapped I/O.
Basic interfacing concepts
The first step in interfacing an I/O device would be to determine which instructions will be used to access it.
If you want the user to use the IN/OUT instructions, then it should be interfaced as a peripheral-mapped I/O device.
If the user should use regular data transfer instructions (LDA, STA, etc.) then it should be interfaced as a memory-mapped I/O device.
The execution of the OUT instruction
The OUT instruction requires 3 machine cycles and 10 T-states.
The first cycle is an opcode fetch cycle to fetch the 1st byte of the instruction from memory (OUT).
The second cycle is a memory read cycle to bring the 8-bit port number from the next location.
The third cycle is an I/O write cycle.
In this cycle, the 8085 places the port number on AD0-AD7 AND A8-A15 and the signal WR is set low (active).
Since the device address is placed on both AD0-AD7 as well as A8-A15, there is no need for de-multiplexing AD0-AD7. A8-A15 can be used directly to identify the device.
The interfacing of output devices
Output devices are usually slow.
Also, the output is usually expected to continue appearing on the output device for a long period of time.
Given that the data will only be present on the data lines for a very short period (microseconds), it has to be latched externally.
To do this the external latch should be enabled when the port’s address is present on the address bus, the IO/M signal is set high and WR is set low.
The resulting signal would be active when the output device is being accessed by the microprocessor.
Decoding the address bus (for memory-mapped devices) follows the same techniques discussed in interfacing memory.