16-11-2012, 05:49 PM
Design and Implementation of Noise Removing Algorithm in VHDL and MATLAB and fitting it into FPGA
[attachment=39873]
Abstract:
Noise removing Algorithm is designed on very time efficient due to additional constraints on memory and other peripheral devices which are programmable devices like Universal FPGA Board which are reconfigurable devices, such Application specific hardware implementation offers much greater speed, this design offers highest performance, but the complexity and the cost associated with the design is very high. Noise removing algorithm is a Technique, which can be developed on a FPGA.
Noise removing algorithm is implemented using VHDL and MATLAB. Using MATLAB an original image is captured and noise (known as salt and pepper noise,) is added to it, an output which is in Matrix form (.dat format) is fed to VHDL simulator like ModelSim where the noise will be filtered by using a Median Filter Technique, which results to a noise free matrix pixels which will be utmost given to MATLAB to achieve the original Image. This was implemented using Xilinx FPGA.
Technique used to remove noise Median Filter
A median filter is a non-linear digital filter which is able to preserve sharp signal changes and is very effective in removing salt and pepper noise .
An Salt and Pepper noise has a gray level with higher or lower value that is different from the neighborhood point.
Linear filters have no ability to remove this type of noise without affecting the distinguishing characteristics of the signal. Median filters have remarkable advantages over linear filters for this particular type of noise.
Description
This module read the three files r.dat, b.dat and g.dat from the RGB module to achieve the filtered image. In the VHDL programming we are performing read (rd), Write (wt) and calc for calculation of pixel. Whenever clock pulse is enabled and read signal is high then read operation is performed on files, else if calculation signal is high then the average and sum of matrix is performed. Otherwise if write signal is enabled then write operation is performed from buffer. The resultant outputs will be in rout.dat, bout.dat and gout.dat files formats. The filtered image is obtained
[attachment=39873]
Abstract:
Noise removing Algorithm is designed on very time efficient due to additional constraints on memory and other peripheral devices which are programmable devices like Universal FPGA Board which are reconfigurable devices, such Application specific hardware implementation offers much greater speed, this design offers highest performance, but the complexity and the cost associated with the design is very high. Noise removing algorithm is a Technique, which can be developed on a FPGA.
Noise removing algorithm is implemented using VHDL and MATLAB. Using MATLAB an original image is captured and noise (known as salt and pepper noise,) is added to it, an output which is in Matrix form (.dat format) is fed to VHDL simulator like ModelSim where the noise will be filtered by using a Median Filter Technique, which results to a noise free matrix pixels which will be utmost given to MATLAB to achieve the original Image. This was implemented using Xilinx FPGA.
Technique used to remove noise Median Filter
A median filter is a non-linear digital filter which is able to preserve sharp signal changes and is very effective in removing salt and pepper noise .
An Salt and Pepper noise has a gray level with higher or lower value that is different from the neighborhood point.
Linear filters have no ability to remove this type of noise without affecting the distinguishing characteristics of the signal. Median filters have remarkable advantages over linear filters for this particular type of noise.
Description
This module read the three files r.dat, b.dat and g.dat from the RGB module to achieve the filtered image. In the VHDL programming we are performing read (rd), Write (wt) and calc for calculation of pixel. Whenever clock pulse is enabled and read signal is high then read operation is performed on files, else if calculation signal is high then the average and sum of matrix is performed. Otherwise if write signal is enabled then write operation is performed from buffer. The resultant outputs will be in rout.dat, bout.dat and gout.dat files formats. The filtered image is obtained