19-11-2012, 11:55 AM
The 8085 Microprocessor Architecture
[attachment=40123]
The 8085 and Its Busses
The 8085 is an 8-bit general purpose microprocessor that can address 64K Byte of memory.
It has 40 pins and uses +5V for power. It can run at a maximum frequency of 3 MHz.
The pins on the chip can be grouped into 6 groups:
Address Bus.
Data Bus.
Control and Status Signals.
Power supply and frequency.
Externally Initiated Signals.
Serial I/O ports.
The Address and Data Busses
The address bus has 8 signal lines A8 – A15 which are unidirectional.
The other 8 address bits are multiplexed (time shared) with the 8 data bits.
So, the bits AD0 – AD7 are bi-directional and serve as A0 – A7 and D0 – D7 at the same time.
During the execution of the instruction, these lines carry the address bits during the early part, then during the late parts of the execution, they carry the 8 data bits.
In order to separate the address from the data, we can use a latch to save the value before the function of the bits changes.
The Control and Status Signals
There are 4 main control and status signals. These are:
ALE: Address Latch Enable. This signal is a pulse that become 1 when the AD0 – AD7 lines have an address on them. It becomes 0 after that. This signal can be used to enable a latch to save the address bits from the AD lines.
RD: Read. Active low.
WR: Write. Active low.
IO/M: This signal specifies whether the operation is a memory operation (IO/M=0) or an I/O operation (IO/M=1).
S1 and S0 : Status signals to specify the kind of operation being performed .Usually un-used in small systems.
Frequency Control Signals
There are 3 important pins in the frequency control group.
X0 and X1 are the inputs from the crystal or clock generating circuit.
The frequency is internally divided by 2.
So, to run the microprocessor at 3 MHz, a clock running at 6 MHz should be connected to the X0 and X1 pins.
CLK (OUT): An output clock pin to drive the clock of the rest of the system.
We will discuss the rest of the control signals as we get to them.
Microprocessor Communication and Bus Timing
To understand how the microprocessor operates and uses these different signals, we should study the process of communication between the microprocessor and memory during a memory read or write operation.
Lets look at timing and the data flow of an instruction fetch operation. (Example 3.1)
Steps For Fetching an Instruction
Lets assume that we are trying to fetch the instruction at memory location 2005. That means that the program counter is now set to that value.
The following is the sequence of operations:
The program counter places the address value on the address bus and the controller issues a RD signal.
The memory’s address decoder gets the value and determines which memory location is being accessed.
The value in the memory location is placed on the data bus.
The value on the data bus is read into the instruction decoder inside the microprocessor.
After decoding the instruction, the control unit issues the proper control signals to perform the operation.
[attachment=40123]
The 8085 and Its Busses
The 8085 is an 8-bit general purpose microprocessor that can address 64K Byte of memory.
It has 40 pins and uses +5V for power. It can run at a maximum frequency of 3 MHz.
The pins on the chip can be grouped into 6 groups:
Address Bus.
Data Bus.
Control and Status Signals.
Power supply and frequency.
Externally Initiated Signals.
Serial I/O ports.
The Address and Data Busses
The address bus has 8 signal lines A8 – A15 which are unidirectional.
The other 8 address bits are multiplexed (time shared) with the 8 data bits.
So, the bits AD0 – AD7 are bi-directional and serve as A0 – A7 and D0 – D7 at the same time.
During the execution of the instruction, these lines carry the address bits during the early part, then during the late parts of the execution, they carry the 8 data bits.
In order to separate the address from the data, we can use a latch to save the value before the function of the bits changes.
The Control and Status Signals
There are 4 main control and status signals. These are:
ALE: Address Latch Enable. This signal is a pulse that become 1 when the AD0 – AD7 lines have an address on them. It becomes 0 after that. This signal can be used to enable a latch to save the address bits from the AD lines.
RD: Read. Active low.
WR: Write. Active low.
IO/M: This signal specifies whether the operation is a memory operation (IO/M=0) or an I/O operation (IO/M=1).
S1 and S0 : Status signals to specify the kind of operation being performed .Usually un-used in small systems.
Frequency Control Signals
There are 3 important pins in the frequency control group.
X0 and X1 are the inputs from the crystal or clock generating circuit.
The frequency is internally divided by 2.
So, to run the microprocessor at 3 MHz, a clock running at 6 MHz should be connected to the X0 and X1 pins.
CLK (OUT): An output clock pin to drive the clock of the rest of the system.
We will discuss the rest of the control signals as we get to them.
Microprocessor Communication and Bus Timing
To understand how the microprocessor operates and uses these different signals, we should study the process of communication between the microprocessor and memory during a memory read or write operation.
Lets look at timing and the data flow of an instruction fetch operation. (Example 3.1)
Steps For Fetching an Instruction
Lets assume that we are trying to fetch the instruction at memory location 2005. That means that the program counter is now set to that value.
The following is the sequence of operations:
The program counter places the address value on the address bus and the controller issues a RD signal.
The memory’s address decoder gets the value and determines which memory location is being accessed.
The value in the memory location is placed on the data bus.
The value on the data bus is read into the instruction decoder inside the microprocessor.
After decoding the instruction, the control unit issues the proper control signals to perform the operation.