04-12-2012, 05:04 PM
SIMULATION WITH THE SEPIC TOPOLOGY
[attachment=42503]
The converter shown below is the ‘Inverse’ SEPIC converter. As also is the case for the
SEPIC converter, this design also does not invert the input to output polarity. It also has
the same (buck/boost) M(D) = D/(1-D) conversion ratio as the SEPIC converter. Notice
that if you visually rotate the SEPIC converter around the Y axis, it looks almost exactly
like the ‘Inverse’ SEPIC converter below (with the addition/subtraction of an
input/output capacitor). This interesting feature allows power to be transferred in one
direction when run as a SEPIC converter and then allows power to flow in the opposite
direction when run as an ‘inverse’ SEPIC converter.
Now implement the schematic shown above in Figure 4 in NL5. It should look like Figure 5
below when complete.
Vg is a DC voltage source (VDC) from the source library. It needs to be set for 120 volts.
L1 is an ideal inductor from the library. Set to 500 μH.
RL1 is an ideal resistor from the library simulating the resistance of L1. Set to 100 mΩ.
C1 is an ideal capacitor from the library. Set to 47 μF.
L2 is an ideal inductor from the library. Set to 100 μH.
RL2 is an ideal resistor from the library simulating the resistance of L1. Set to 20 mΩ.
D1 is an ideal diode from the library. Set to 700 mV (diode drop).
C2 is an ideal capacitor from the library. Set to 200 μF.
O1 is an ideal comparator used to turn the switch S1 on and off. By varying the width of V3
below, its output will act as a Pulse Width Modulator.
S1 is a voltage controlled switch, a standard component in the library.
V2 is 0.5 volt reference for the Schmitt trigger comparator O1. Set V2 to 500 mV.
V3 is Pulsing source. Set to values listed below using the components editing window. This sets
it to a switching frequency of 100 kHz with a 50% duty cycle.
[attachment=42503]
The converter shown below is the ‘Inverse’ SEPIC converter. As also is the case for the
SEPIC converter, this design also does not invert the input to output polarity. It also has
the same (buck/boost) M(D) = D/(1-D) conversion ratio as the SEPIC converter. Notice
that if you visually rotate the SEPIC converter around the Y axis, it looks almost exactly
like the ‘Inverse’ SEPIC converter below (with the addition/subtraction of an
input/output capacitor). This interesting feature allows power to be transferred in one
direction when run as a SEPIC converter and then allows power to flow in the opposite
direction when run as an ‘inverse’ SEPIC converter.
Now implement the schematic shown above in Figure 4 in NL5. It should look like Figure 5
below when complete.
Vg is a DC voltage source (VDC) from the source library. It needs to be set for 120 volts.
L1 is an ideal inductor from the library. Set to 500 μH.
RL1 is an ideal resistor from the library simulating the resistance of L1. Set to 100 mΩ.
C1 is an ideal capacitor from the library. Set to 47 μF.
L2 is an ideal inductor from the library. Set to 100 μH.
RL2 is an ideal resistor from the library simulating the resistance of L1. Set to 20 mΩ.
D1 is an ideal diode from the library. Set to 700 mV (diode drop).
C2 is an ideal capacitor from the library. Set to 200 μF.
O1 is an ideal comparator used to turn the switch S1 on and off. By varying the width of V3
below, its output will act as a Pulse Width Modulator.
S1 is a voltage controlled switch, a standard component in the library.
V2 is 0.5 volt reference for the Schmitt trigger comparator O1. Set V2 to 500 mV.
V3 is Pulsing source. Set to values listed below using the components editing window. This sets
it to a switching frequency of 100 kHz with a 50% duty cycle.