21-12-2012, 05:16 PM
MULTI-STANDARD DEVELOPMENT AND MEASURING PLATFORM FOR MIMO-SOFTWARE DEFINED RADIO
[attachment=44806]
ABSTRACT
The demand for ever higher speed mobile communication is
one of the main drivers of the telecommunication industry. A
promising method capable of achieving high data rates is
multiple input – multiple output (MIMO) technology, which
has the potential to increase capacity linearly with the number
of antennas. The development and measurement platform
presented in this paper will simplify the design process
of communication systems based on MIMO or smart antenna
technology. It is compliant to GSM, UMTS and
WLAN standards. In particular the development of software
defined radio systems (SDR) is simplified and needs no system
changes for supporting each of these standards. Moreover,
the system is a flexible testbed for MIMO channel
experiments and measurements. It comprises a multi channel
receiver for implementation of a SDR and a MIMO
channel simulator for evaluation of MIMO or smart antenna
algorithms.
INTRODUCTION
Multiple input – multiple output (MIMO) techniques are a
determining factor in future communications systems. They
offer significant improvements in spectral efficiency and
reliability. However, MIMO algorithms are rather complex,
making their implementation in hardware difficult and erroneous.
Since redesigns are quite costly (approx. 1 million
USD per redesign [1]), it is desirable to detect and eliminate
fundamental errors early in the design of a MIMO chip.
The primary purpose of the described development platform
is the assistance in building software defined radio systems
(SDR) and prototypes. It can also be used for validation
of end-to-end transmission scenarios. With its built-in realtime
channel simulator, the development platform is able to
carry out dependable, unlimited in time and reproducible
real-time simulation. It therefore reduces costs to a high
amount, since there is no need for time consuming field tests.
DSP-BOARD
Baseband Processing
The base of the development platform is a DSP/FPGA signal
processing board offering high processing power and a multitude
of interfaces; especially LVDS (Low Voltage Differential
Signaling) interfaces for transmitting baseband signals
at highest possible clock rate (see Figure 2). This signal
processing board forms the base for implementation of the
MIMO receiver as well as for the MIMO real time channel
simulator.
The DSP TMS320C6416 (600 MHz- or 1 GHz- version)
with its built-in Viterbi decoder is tailored for calculation of
complex MIMO tasks. The FPGA XC2V2000 from XILINX
with its 56 built-in 18 x 18 multipliers is used for I/O interfacing
and for fast calculation tasks, which are suitable for
parallelisation. For example, for the channel engine of the
channel simulator, 24 calculation paths have been designed
to carry out identical calculation steps (superposition of several
signals) simultaneously.
Analogue Processing
Each DSP-board can optionally be equipped
with an analogue frontend. It comprises a
digitizer and a D/A converter plus a FPGA
XC2VP30, which handles I/O interfacing, digital mixing,
and controlling of the board (see Figure 3). The digitizer is
built by two ADS5500 from TI and under samples the IF
signal at a sampling rate of e.g. 112 MSPS using 14 bits.
Direct sampling of the 140 MHz IF reduces errors associated
with analogue processing – in particular I-Q balancing is
nearly perfect. The digitized signal is digitally mixed down
into digital baseband. The complex mixer is implemented
inside the FPGA and uses a arbitrary oscillator frequency, so
it is not restricted to a frequency of FS/4, where FS is the IF
frequency.
RF frontend
One RF frontend (1 transmitter and 1 receiver) plus one
analogue board convert one MIMO RF channel into a baseband
signal and vice versa. The RF frontends are separated
from the rest of the system and reside in an own rack identical
to the rack of the platform to reduce influences on the
system. Both the transmitter and the receiver are implemented
on a separate board. The first version of the RF receiver
is designed for WLAN signals only and operates with
input signals in the frequency range from 5,15 to 5,25 GHz..
Extensions complying GSM and UMTS standards are
planned for the next version. The receiver has a two staged
down converter to 140 MHz intermediate frequency (IF) with
four different IF filters, selectable by a pin-diode switch and
corresponding to the different bandwidths (maximum of 56
MHz) of the individual wireless standards. The first IF filter
has a centre frequency of 947 MHz and a fix bandwidth of 56
MHz.
MIMO-RECEIVER
The platform’s receiver unit comprises two DSP-boards and
two extension boards providing additional LVDS input connectors
at the front of the rack. Alternatively, the analogue
boards can be used at the receiver side providing two analogue
inputs for each board. So the receiver can operate with
a maximum of eight input BB signals or up to four analogue
input signals.
With the support of rapid prototyping and hardware in
the loop, designing and validating algorithms can be performed
efficiently, resulting in shorter development cycles
and lower costs [2]. A “Golden Code” is designed in Generic
C, which is primary C language enriched with predefined
keywords for interfacing. The mapping tool GenC maps Generic
C algorithms into C code for the receiver or into Simulink
S-functions. An automatic partitioning of blocks to the
DSP or to the FPGA is supported by the tool. The receiver
can also be integrated into Simulink working as a “hardware
in the loop“ [1]. The tool GenCAddon extends the C-code
with initialize, transmission and reception routines. So it is
possible to co-simulate algorithms in Simulink as well as on
the targeted hardware.
SUMMARY
We have presented a development platform which simplifies
the design cycle of a MIMO software defined radio. It comprises
a multi channel receiver and a MIMO channel simulator
for evaluation of MIMO algorithms.
Highly flexible DSP boards featuring a synergetic combination
of DSP/FPGA processing on the one hand, powerful
data communication and elaborate system architecture on the
other hand result in a platform offering highest performance
and a vast field of functionalities.
The support of rapid prototyping and the integration of
standard simulation tools make this development platform a
comfortable tool which definitely speeds up simulation of
MIMO algorithms.
[attachment=44806]
ABSTRACT
The demand for ever higher speed mobile communication is
one of the main drivers of the telecommunication industry. A
promising method capable of achieving high data rates is
multiple input – multiple output (MIMO) technology, which
has the potential to increase capacity linearly with the number
of antennas. The development and measurement platform
presented in this paper will simplify the design process
of communication systems based on MIMO or smart antenna
technology. It is compliant to GSM, UMTS and
WLAN standards. In particular the development of software
defined radio systems (SDR) is simplified and needs no system
changes for supporting each of these standards. Moreover,
the system is a flexible testbed for MIMO channel
experiments and measurements. It comprises a multi channel
receiver for implementation of a SDR and a MIMO
channel simulator for evaluation of MIMO or smart antenna
algorithms.
INTRODUCTION
Multiple input – multiple output (MIMO) techniques are a
determining factor in future communications systems. They
offer significant improvements in spectral efficiency and
reliability. However, MIMO algorithms are rather complex,
making their implementation in hardware difficult and erroneous.
Since redesigns are quite costly (approx. 1 million
USD per redesign [1]), it is desirable to detect and eliminate
fundamental errors early in the design of a MIMO chip.
The primary purpose of the described development platform
is the assistance in building software defined radio systems
(SDR) and prototypes. It can also be used for validation
of end-to-end transmission scenarios. With its built-in realtime
channel simulator, the development platform is able to
carry out dependable, unlimited in time and reproducible
real-time simulation. It therefore reduces costs to a high
amount, since there is no need for time consuming field tests.
DSP-BOARD
Baseband Processing
The base of the development platform is a DSP/FPGA signal
processing board offering high processing power and a multitude
of interfaces; especially LVDS (Low Voltage Differential
Signaling) interfaces for transmitting baseband signals
at highest possible clock rate (see Figure 2). This signal
processing board forms the base for implementation of the
MIMO receiver as well as for the MIMO real time channel
simulator.
The DSP TMS320C6416 (600 MHz- or 1 GHz- version)
with its built-in Viterbi decoder is tailored for calculation of
complex MIMO tasks. The FPGA XC2V2000 from XILINX
with its 56 built-in 18 x 18 multipliers is used for I/O interfacing
and for fast calculation tasks, which are suitable for
parallelisation. For example, for the channel engine of the
channel simulator, 24 calculation paths have been designed
to carry out identical calculation steps (superposition of several
signals) simultaneously.
Analogue Processing
Each DSP-board can optionally be equipped
with an analogue frontend. It comprises a
digitizer and a D/A converter plus a FPGA
XC2VP30, which handles I/O interfacing, digital mixing,
and controlling of the board (see Figure 3). The digitizer is
built by two ADS5500 from TI and under samples the IF
signal at a sampling rate of e.g. 112 MSPS using 14 bits.
Direct sampling of the 140 MHz IF reduces errors associated
with analogue processing – in particular I-Q balancing is
nearly perfect. The digitized signal is digitally mixed down
into digital baseband. The complex mixer is implemented
inside the FPGA and uses a arbitrary oscillator frequency, so
it is not restricted to a frequency of FS/4, where FS is the IF
frequency.
RF frontend
One RF frontend (1 transmitter and 1 receiver) plus one
analogue board convert one MIMO RF channel into a baseband
signal and vice versa. The RF frontends are separated
from the rest of the system and reside in an own rack identical
to the rack of the platform to reduce influences on the
system. Both the transmitter and the receiver are implemented
on a separate board. The first version of the RF receiver
is designed for WLAN signals only and operates with
input signals in the frequency range from 5,15 to 5,25 GHz..
Extensions complying GSM and UMTS standards are
planned for the next version. The receiver has a two staged
down converter to 140 MHz intermediate frequency (IF) with
four different IF filters, selectable by a pin-diode switch and
corresponding to the different bandwidths (maximum of 56
MHz) of the individual wireless standards. The first IF filter
has a centre frequency of 947 MHz and a fix bandwidth of 56
MHz.
MIMO-RECEIVER
The platform’s receiver unit comprises two DSP-boards and
two extension boards providing additional LVDS input connectors
at the front of the rack. Alternatively, the analogue
boards can be used at the receiver side providing two analogue
inputs for each board. So the receiver can operate with
a maximum of eight input BB signals or up to four analogue
input signals.
With the support of rapid prototyping and hardware in
the loop, designing and validating algorithms can be performed
efficiently, resulting in shorter development cycles
and lower costs [2]. A “Golden Code” is designed in Generic
C, which is primary C language enriched with predefined
keywords for interfacing. The mapping tool GenC maps Generic
C algorithms into C code for the receiver or into Simulink
S-functions. An automatic partitioning of blocks to the
DSP or to the FPGA is supported by the tool. The receiver
can also be integrated into Simulink working as a “hardware
in the loop“ [1]. The tool GenCAddon extends the C-code
with initialize, transmission and reception routines. So it is
possible to co-simulate algorithms in Simulink as well as on
the targeted hardware.
SUMMARY
We have presented a development platform which simplifies
the design cycle of a MIMO software defined radio. It comprises
a multi channel receiver and a MIMO channel simulator
for evaluation of MIMO algorithms.
Highly flexible DSP boards featuring a synergetic combination
of DSP/FPGA processing on the one hand, powerful
data communication and elaborate system architecture on the
other hand result in a platform offering highest performance
and a vast field of functionalities.
The support of rapid prototyping and the integration of
standard simulation tools make this development platform a
comfortable tool which definitely speeds up simulation of
MIMO algorithms.