21-12-2012, 05:52 PM
Single-chip 16/32-bit microcontrollers; 128/256 kB ISP/IAP Flash with 10-bit ADC and CAN
[attachment=44832]
General description
The LPC2119/LPC2129 are based on a 16/32 bit ARM7TDMI-S“ CPU with real-time
emulation and embedded trace support, together with 128/256 kilobytes (kB) of
embedded high speed ßash memory. A 128-bit wide memory interface and a unique
accelerator architecture enable 32-bit code execution at maximum clock rate. For
critical code size applications, the alternative 16-bit Thumb¤ Mode reduces code by
more than 30 % with minimal performance penalty.
With their compact 64 pin package, low power consumption, various 32-bit timers,
4-channel 10-bit ADC, 2 advanced CAN channels, PWM channels and 46 GPIO lines
with up to 9 external interrupt pins these microcontrollers are particularly suitable for
automotive and industrial control applications as well as medical systems and
fault-tolerant maintenance buses. With a wide range of additional serial
communications interfaces, they are also suited for communication gateways and
protocol converters as well as many other general-purpose applications.
Key features
16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.
16 kB on-chip Static RAM.
128/256 kB on-chip Flash Program Memory. 128-bit wide interface/accelerator
enables high speed 60 MHz operation.
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip
boot-loader software. Flash programming takes 1 ms per 512 byte line. Single
sector or full chip erase takes 400 ms.
EmbeddedICE-RT interface enables breakpoints and watch points. Interrupt
service routines can continue to execute while the foreground task is debugged
with the on-chip RealMonitor“ software.
Embedded Trace Macrocell enables non-intrusive high speed real-time tracing of
instruction execution.
Two interconnected CAN interfaces with advanced acceptance Þlters.
Four channel 10-bit A/D converter with conversion time as low as 2.44 ms.
Multiple serial interfaces including two UARTs (16C550), Fast I2C (400 kbits/s)
and two SPIs
60 MHz maximum CPU clock available from programmable on-chip
Phase-Locked Loop with settling time of 100 ms.
Vectored Interrupt Controller with conÞgurable priorities and vector addresses.
Two 32-bit timers (with four capture and four compare channels), PWM unit (six
outputs), Real Time Clock and Watchdog.
Architectural overview
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high
performance and very low power consumption. The ARM¤ architecture is based on
Reduced Instruction Set Computer (RISC) principles, and the instruction set and
related decode mechanism are much simpler than those of microprogrammed
Complex Instruction Set Computers. This simplicity results in a high instruction
throughput and impressive real-time interrupt response from a small and
cost-effective processor core.
Pipeline techniques are employed so that all parts of the processing and memory
systems can operate continuously. Typically, while one instruction is being executed,
its successor is being decoded, and a third instruction is being fetched from memory.
The ARM7TDMI-S processor also employs a unique architectural strategy known as
Thumb, which makes it ideally suited to high-volume applications with memory
restrictions, or applications where code density is an issue.
On-Chip Flash program memory
The LPC2119/LPC2129 incorporate a 128 kB and 256 kB Flash memory system
respectively. This memory may be used for both code and data storage.
Programming of the Flash memory may be accomplished in several ways. It may be
programmed In System via the serial port. The application program may also erase
and/or program the Flash while the application is running, allowing a great degree of
ßexibility for data storage Þeld Þrmware upgrades, etc. When on-chip bootloader is
used, 120/248 kB of Flash memory is available for user code.
The LPC2119/LPC2129 Flash memory provides a minimum of 100,000 erase/write
cycles and 20 years of data retention.
[attachment=44832]
General description
The LPC2119/LPC2129 are based on a 16/32 bit ARM7TDMI-S“ CPU with real-time
emulation and embedded trace support, together with 128/256 kilobytes (kB) of
embedded high speed ßash memory. A 128-bit wide memory interface and a unique
accelerator architecture enable 32-bit code execution at maximum clock rate. For
critical code size applications, the alternative 16-bit Thumb¤ Mode reduces code by
more than 30 % with minimal performance penalty.
With their compact 64 pin package, low power consumption, various 32-bit timers,
4-channel 10-bit ADC, 2 advanced CAN channels, PWM channels and 46 GPIO lines
with up to 9 external interrupt pins these microcontrollers are particularly suitable for
automotive and industrial control applications as well as medical systems and
fault-tolerant maintenance buses. With a wide range of additional serial
communications interfaces, they are also suited for communication gateways and
protocol converters as well as many other general-purpose applications.
Key features
16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.
16 kB on-chip Static RAM.
128/256 kB on-chip Flash Program Memory. 128-bit wide interface/accelerator
enables high speed 60 MHz operation.
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip
boot-loader software. Flash programming takes 1 ms per 512 byte line. Single
sector or full chip erase takes 400 ms.
EmbeddedICE-RT interface enables breakpoints and watch points. Interrupt
service routines can continue to execute while the foreground task is debugged
with the on-chip RealMonitor“ software.
Embedded Trace Macrocell enables non-intrusive high speed real-time tracing of
instruction execution.
Two interconnected CAN interfaces with advanced acceptance Þlters.
Four channel 10-bit A/D converter with conversion time as low as 2.44 ms.
Multiple serial interfaces including two UARTs (16C550), Fast I2C (400 kbits/s)
and two SPIs
60 MHz maximum CPU clock available from programmable on-chip
Phase-Locked Loop with settling time of 100 ms.
Vectored Interrupt Controller with conÞgurable priorities and vector addresses.
Two 32-bit timers (with four capture and four compare channels), PWM unit (six
outputs), Real Time Clock and Watchdog.
Architectural overview
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high
performance and very low power consumption. The ARM¤ architecture is based on
Reduced Instruction Set Computer (RISC) principles, and the instruction set and
related decode mechanism are much simpler than those of microprogrammed
Complex Instruction Set Computers. This simplicity results in a high instruction
throughput and impressive real-time interrupt response from a small and
cost-effective processor core.
Pipeline techniques are employed so that all parts of the processing and memory
systems can operate continuously. Typically, while one instruction is being executed,
its successor is being decoded, and a third instruction is being fetched from memory.
The ARM7TDMI-S processor also employs a unique architectural strategy known as
Thumb, which makes it ideally suited to high-volume applications with memory
restrictions, or applications where code density is an issue.
On-Chip Flash program memory
The LPC2119/LPC2129 incorporate a 128 kB and 256 kB Flash memory system
respectively. This memory may be used for both code and data storage.
Programming of the Flash memory may be accomplished in several ways. It may be
programmed In System via the serial port. The application program may also erase
and/or program the Flash while the application is running, allowing a great degree of
ßexibility for data storage Þeld Þrmware upgrades, etc. When on-chip bootloader is
used, 120/248 kB of Flash memory is available for user code.
The LPC2119/LPC2129 Flash memory provides a minimum of 100,000 erase/write
cycles and 20 years of data retention.