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IMPLEMENTATION OF DATA ACQUISITION SYSTEM USING VIRTEX 2 PRO FPGA

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INTRODUCTION

The emergence of Field Programmable Gate Arrays (FPGAs) with embedded processors and significant progress in their development tools have contributed to the realization of high performance interfaces, run simultaneously in the FPGA logic. Important application areas of FPGAs are Data acquisition systems.
Data acquisition is the process of sampling signals that measure real world physical conditions and converting the resulting samples into digital numeric values that can be manipulated by a computer.

Aim of the project

To determine the limitations that a fluctuating environment places on target detection methods, a data acquisition system is being developed.
The data acquisition system consists of multi-channel, high-speed A/D and FPGA technology to control it.
The basic aim of this project is to route various channels to which the sensors are connected to the Analog to Digital Converter (ADC) through multiplexers.

The components of data acquisition systems include:

Sensors that convert physical parameters to electrical signals.
Signal conditioning circuitry to convert sensor signals into a form that can be converted to digital values.
Analog-to-digital converters (ADC), which convert conditioned sensor signals to digital values.
An ADC is one of the key components in Data acquisition systems as it governs the speed and performance of the systems.

DESCRIPTION OF BLOCK DIAGRAM

FPGA


FPGA is introduced in 1985 by Xilinx.
Field programmable gate array, a type of logic chip that can be programmed. An FPGA is similar to a PLD, but whereas PLDs are generally limited to hundreds of gates, FPGAs support thousands of gates.
Fpga consists of logic blocks, routing matrix, I/O blocks, memory, advanced features.

Software and hardware components

This project describes the implementation and integration of hardware and software of a serial ADC in a Virtex-2 pro FPGA with an embedded Power PC 405 processor.
A 16-bit ADC with high speed, low power serial interface will be implemented in VHDL using Xilinx ISE. The hardware and software will be developed and combined using Xilinx EDK.
Xilinx Platform Studio (XPS) will be used to perform synthesis, place and route and obtain the configuration bit-stream. The final configuration bit will be downloaded onto the custom target board using Impact tool and the results will be verified.