04-01-2013, 04:38 PM
COMMON SOURCE AMPLIFIER
[attachment=46534]
COMMON SOURCE AMPLIFIER
To find the voltage gain of a CS amplifier and to find its frequency response
APPARATUS:
FETBFW10
RESISTORS
Capacitors
Signal generator &CRO
CIRCUIT DIAGRAM:
THEORY:
The CS amplifier is a small signal amplifier. For good bias stability, the source resistor
voltage drop should be as large as possible. Where the supply voltage is small, Vs may be
reduced to a minimum to allow for the minimum level of Vds.R2 is usually selected as 1MΏ
or less as for BJT capacitor coupled circuit, coupling and bypass capacitors should be
selected to have the smallest possible capacitance values. The largest capacitor in the circuit
sets the circuit low 3dB frequency (capacitor C2). Generally to have high input impedance
FET is used. As in BJT circuit RL is usually much larger than Zo and Zi is often much
larger than Rs.
EC-I Lab Manual EC-261
BAPATLA ENGINEERING COLLEGE (Autonomous):: BAPATLA
PROCEDURE:
1. Connect the circuit as per the circuit diagram
2. Give 1 KHz signal and 25 mv (P-P) as Vs from signal generator.
3 Observe the output on CRO for proper working of the amplifier.
4 After ensuring the amplifier function, vary signal frequency from 50 Hz to
600 Hz in proper steps for 15-20 readings keeping Vs =25mv(PP)
at every frequency ,note down the resulting output voltage and
tabulate in a table
5. Calculate gain in dB and plot on semi log graph paper for frequency Vs gain
[attachment=46534]
COMMON SOURCE AMPLIFIER
To find the voltage gain of a CS amplifier and to find its frequency response
APPARATUS:
FETBFW10
RESISTORS
Capacitors
Signal generator &CRO
CIRCUIT DIAGRAM:
THEORY:
The CS amplifier is a small signal amplifier. For good bias stability, the source resistor
voltage drop should be as large as possible. Where the supply voltage is small, Vs may be
reduced to a minimum to allow for the minimum level of Vds.R2 is usually selected as 1MΏ
or less as for BJT capacitor coupled circuit, coupling and bypass capacitors should be
selected to have the smallest possible capacitance values. The largest capacitor in the circuit
sets the circuit low 3dB frequency (capacitor C2). Generally to have high input impedance
FET is used. As in BJT circuit RL is usually much larger than Zo and Zi is often much
larger than Rs.
EC-I Lab Manual EC-261
BAPATLA ENGINEERING COLLEGE (Autonomous):: BAPATLA
PROCEDURE:
1. Connect the circuit as per the circuit diagram
2. Give 1 KHz signal and 25 mv (P-P) as Vs from signal generator.
3 Observe the output on CRO for proper working of the amplifier.
4 After ensuring the amplifier function, vary signal frequency from 50 Hz to
600 Hz in proper steps for 15-20 readings keeping Vs =25mv(PP)
at every frequency ,note down the resulting output voltage and
tabulate in a table
5. Calculate gain in dB and plot on semi log graph paper for frequency Vs gain