14-01-2013, 04:39 PM
ARM Exception Handling and SoftWare Interrupts (SWI)
[attachment=46874]
The Frame Pointer
fp points to top of the stack area for the current function
Or zero if not being used
By using the frame pointer and storing it at the same offset for every function call, it creates a singlylinked list of activation records
The fp register points to the stack backtrace structure for the currently executing function.
The saved fp value is (zero or) a pointer to a stack backtrace structure created by the function which called the current function.
The saved fp value in this structure is a pointer to the stack backtrace structure for the function that called the function that called the current function; and so on back until the first function.
ARM Processor Modes (of interest to us)
User: the “normal” program execution mode.
IRQ: used for general-purpose interrupt handling.
Supervisor: a protected mode for the operating system.
(there are also Abort, FIQ and Undef modes)
The ARM Register Set
Registers R0-R15 + CPSR (Current Program Status Register)
R13: Stack Pointer (by convention)
R14: Link Register (hardwired)
R15: Program Counter where bits 0:1 are ignored (hardwired)
Terminology
The terms exception and interrupt are often confused
Exception usually refers to an internal CPU event such as
floating point overflow
MMU fault (e.g., page fault)
trap (SWI)
Interrupt usually refers to an external I/O event such as
I/O device request
reset
In the ARM architecture manuals, the two terms are mixed together
[attachment=46874]
The Frame Pointer
fp points to top of the stack area for the current function
Or zero if not being used
By using the frame pointer and storing it at the same offset for every function call, it creates a singlylinked list of activation records
The fp register points to the stack backtrace structure for the currently executing function.
The saved fp value is (zero or) a pointer to a stack backtrace structure created by the function which called the current function.
The saved fp value in this structure is a pointer to the stack backtrace structure for the function that called the function that called the current function; and so on back until the first function.
ARM Processor Modes (of interest to us)
User: the “normal” program execution mode.
IRQ: used for general-purpose interrupt handling.
Supervisor: a protected mode for the operating system.
(there are also Abort, FIQ and Undef modes)
The ARM Register Set
Registers R0-R15 + CPSR (Current Program Status Register)
R13: Stack Pointer (by convention)
R14: Link Register (hardwired)
R15: Program Counter where bits 0:1 are ignored (hardwired)
Terminology
The terms exception and interrupt are often confused
Exception usually refers to an internal CPU event such as
floating point overflow
MMU fault (e.g., page fault)
trap (SWI)
Interrupt usually refers to an external I/O event such as
I/O device request
reset
In the ARM architecture manuals, the two terms are mixed together