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Full Version: ARCHITECHTURE or FUNCTIONAL BLOCK DIAGRAM OF 8085
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ARCHITECHTURE or FUNCTIONAL BLOCK DIAGRAM OF 8085

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The functional block diagram or architecture of 8085 Microprocessor is very important as it gives the complete details about a Microprocessor. Fig. shows the Block diagram of a Microprocessor.

8085 Bus Structure:

Address Bus:

• The address bus is a group of 16 lines generally identified as A0 to A15.
• The address bus is unidirectional: bits flow in one direction-from the MPU to peripheral devices.
• The MPU uses the address bus to perform the first function: identifying a peripheral or a memory location.

Data Bus:

• The data bus is a group of eight lines used for data flow.
• These lines are bi-directional - data flow in both directions between the MPU and memory and peripheral devices.
• The MPU uses the data bus to perform the second function: transferring binary information.
• The eight data lines enable the MPU to manipulate 8-bit data ranging from 00 to FF (28 = 256 numbers).
• The largest number that can appear on the data bus is 11111111.

Control Bus:

• The control bus carries synchronization signals and providing timing signals.
• The MPU generates specific control signals for every operation it performs. These signals are used to identify a device type with which the MPU wants to communicate.

Registers of 8085:

• The 8085 have six general-purpose registers to store 8-bit data during program execution.
• These registers are identified as B, C, D, E, H, and L.
They can be combined as register pairs-BC, DE, and HL-to perform some 16-bit operations.