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SOPC-based Voiceprint Identification System


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Design Introduction

As globalization, networking, information and digital era’s coming, the demand of
high reliability of our identity verification is growing.An efficient mean to this is by
authenticating users through biometric methods. Among the existing biometric
methods, voice biometrics can be an affordable and accurate authentication
technology that has been already successfully and widely employed. Voiceprint, as a
basic human physiological characteristics, possess a unique role which is difficult to
counterfeit, imitate and replace.As a non-contact identification technology, Voice
Recognition Technology is being accepted by the users.
Voice authentication refers to the process of accepting or rejecting the identity claim
of a speaker on the basis of individual information present in the speech waveform . It
has received increasing attention over the past two decades, as a convenient,
user-friendly way of replacing (or supplementing) standard password-type matching.
The authentication procedure requests from the user to pronounce a random sequence
of digits. After capturing speech and extracting voice features, individual voice
characteritics are generated by registration algorithm. The central process unit decides
whether the received features match the stored voiceprint of the customer who claims
to be, and accordingly grants authentication.
In this work, the architecture of an sopc-based voiceprint identification system is
presented.

1. Voice Recognition Technology Principle

Voice Recognition, also known as the Speaker Recognition, has two categories:
speaker identification and speaker verification. Speaker identification is used to
determine which one of the people speaks, i.e. "one out of more election" ; and
speaker verification is used to determine whether a person specified speaks, i.e.
"one-on-one recognition".
According to the voice of different materials, voice recognition can be divided into
the text-dependent, and text-independent technology. The text-dependent voice
recognition system requires speaker pronounce in accordance with the contents of the
text. Each person's individual sound profile model is established accurately. People
must also be identified by the contents of the text during recognition to achieve better
effect. Text-independent recognition system does not require fixed contents of words,
which is relatively difficult to model, but is convenient for user and can be applied to
a wide range.
Voiceprint recognition is an application based on physiological and behavioral
characteristics of the speaker’s voice and linguistic patterns. Different from speech
recognition, voiceprint recognition is regardless of contents of speech.Rather, the
unique features of voice are analyzed to identify the speaker. With voice samples, the
unique features will be extracted and converted to digital symbols, and then these
symbols are stored as that person's character template. This template is stored in a
computer database, a smart card or bar-coded cards. User authentication is processed
inside the recognition system to identify matching or not. The system architecture
block diagram is shown in Figure 1.
1 voiceprint recognition system architecture block diagram

. Hardware Implementation


The Altera DE1 development board features a state-of-the-art Cyclone® II 2C20
FPGA in a 484-pin package. All important components on the board are connected to
pins of this chip, allowing the user to control all aspects of the board’s operation.
This design is implemented by a 32bit NiosII softcore processor.All IPs are connected
on the avalon bus in SOPC builder, including custom peripherals
Figure 2 hardware architecture
The system hardware architecture is shown in figure 2,including CPU,uart,tri-state
bridge,ram and I/O controls,which are all reusable.Such a design method not only
voice acquisition
transmission
decompression Feature extraction
compression
Quality control
Pattern matching
Template
database
classification
Recognition

make it modulization,but also greatly reduce the design cycle of the system.FFT
module can not only access IP directly, but also use C2H accelerator tool to improve
system performance.In this design ,performance-critical sections such as FFT,DCT
and iterative computations will be implemented via C2H hardware accelerator.
Nios II softcore processor
Nios II is a high performance 32-bit sofcore processor. The processor is configured on
an Altera Cyclone II FPGA. Custom instructions are added to improve system
performance, furthermore, more on-chip rams can be added to improve data
processing capacity.
Voice acquisition and verification report
The DE1 board provides high-quality 24-bit audio via the Wolfson WM8731 audio
CODEC(enCOder/DECoder). This chip supports microphone-in, line-in, and line-out
ports, with a sample rate adjustable from 8 kHz to 96 kHz. The WM8731 is controlled
by a serial I2C bus interface, which is connected to pins on the Cyclone II FPGA. A
schematic diagram of the audio circuitry is shown in Figure 3.