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Nonlinear Pipeline Processors

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INTRODUCTION

A dynamic pipeline can be recon gured to perform variable functions at di erent times.
The traditional pipelines like the ones presented in the previous tutorial are used to perform
xed functions (like fetch, decode, execute, write back, etc.).

Reservation and Latency Analysis

This can be represented in form of a Reservation table as in Table 1 and Table 2. The
checkmarks in each row of the reservation table correspond to the time instants (cycles)
that a particular stage will be used.
There may be multiple checkmarks in a row, which means repeated usage of the same
stage in di erent cycles. Contiguous checkmarks in a row simply imply the extended usage
of a stage over more than one cycle. Multiple checkmarks in a column mean that multiple
stages are used in parallel during a particular clock cycle.

Some Important De nitions

Evaluation Time The number of columns in a reservation table is called the evaluation
time of a given function. For example, function X requires eight clock cycles to evaluate,
and function Y requires six clock cycles, as shown in Table 1 and Table 2, respectively.
Latency Analysis The number of times units between two initiations of a pipeline is
the latency between them. A latency of k means that two initiations are separated by k
clock cycles.
Collision Any attempt by two or more initiations to use the same pipeline stage at the
same time will cause a collision. A collision implies resource con
ict between two initiations
in the pipeline. Therefore, all collisions must be avoided in scheduling a sequence of pipeline
initiations.

Collision Vectors

A permissible latency of p = 1 corresponds to the ideal case. In theory, a latency of 1 can
always be achieved in a static linear pipeline.
The combined set of permissible and forbidden latencies can be easily displayed by a
collision vector, which is an m-bit binary vector C = (CmCm