Seminar Topics & Project Ideas On Computer Science Electronics Electrical Mechanical Engineering Civil MBA Medicine Nursing Science Physics Mathematics Chemistry ppt pdf doc presentation downloads and Abstract

Full Version: Architecture of the 8088 Report
You're currently viewing a stripped down version of our content. View the full version with proper formatting.
Architecture of the 8088

[attachment=54830]


Introduction:

To discuss the architecture of the 8088 and the PC system. Write assembly language applications to run on these types of systems.

Discussion:

The Intel 8088 will be the process we will discuss. The systems we will use in the lab have Pentium II processors but support code written for the 8088, providing Windows allows us.
Above is the block diagram of the 8088 microprocessor. We can see that there are a number of registers AX, BX, CX, DX which I call the working registers. These registers are used to store temporary values for the current or near current instructions that the CPU is about to execute. DI and SI registers are the index registers which can be used effectively as working registers but also have special uses with certain instructions. The Segment registers are to tell the processor which segment ( 64K block of memory ) CS code segment, DS data segment, SS stack segment, and an Extra segment register for temporary use.
The ALU is the numeric heart of the CPU providing all arithimetic and logical functions. The Flag register works with the ALU to signify certain events when they occur (eg. carry or zero result). There is a shared address data bus (on which data and address signals flow within the CPU), an instruction cache (prepared to execute the next instruction of the application) , and a memory interface. The memory interface provides a transparent via from segmented convention to physical memory address, let me explain. As mentioned before we have segment registers that point to 64K blocks of memory. The Intel 8088 processor addressed memory in these blocks and within these blocks are 64K of code or data and the addresses of these are offset addresses. So each memory location in RAM, ROM have a segment address and an offset address to define its actual physical memory address. The translation of the segmented address to the physical address is to shift the segment address 4 bits left and add the offset which yields a 20 bit physical from to 16 bit registers. For example in this lab we will write to the b800h segment which is the start of the text video memory. Each location on the text screen is a byte character and a byte attribute (color) which is pointed to by the offset address.