06-06-2013, 12:09 PM
8086 ARCHITECTURE&PIN DIAGRAM
[attachment=54851]
8086 FEATURES
16-bit Arithmetic Logic Unit
16-bit data bus (8088 has 8-bit data bus)
20-bit address bus - 220 = 1,048,576 = 1 meg
The address refers to a byte in memory.
In the 8088, these bytes come in on the 8-bit data bus. In the 8086, bytes at even addresses come in on the low half of the data bus (bits 0-7) and bytes at odd addresses come in on the upper half of the data bus (bits 8-15).
The 8086 can read a 16-bit word at an even address in one operation and at an
odd address in two operations. The 8088 needs two operations in either case.
The least significant byte of a word on an 8086 family microprocessor is at the
lower address.
8086 ARCHITECTURE
The 8086 has two parts,
the Bus Interface Unit (BIU) and
the Execution Unit (EU).
The BIU fetches instructions, reads and writes data, and computes the 20-bit address.
The EU decodes and executes the instructions using the 16-bit ALU.
The BIU contains the following registers:
IP - the Instruction Pointer
CS - the Code Segment Register
DS - the Data Segment Register
SS - the Stack Segment Register
ES - the Extra Segment Register
The BIU fetches instructions using the CS and IP, written CS:IP, to contract
the 20-bit address. Data is fetched using a segment register (usually the DS)
and an effective address (EA) computed by the EU depending on the
addressing mode.
8086 maximum & minimum modes
8086 maximum & minimum modes
The mode is controlled by MN/MX.
Maximum mode is obtained by connecting MN/MX to low and minimum mode is by connecting it to high.
Having two different modes (minimum and maximum) is used only 8088/8086.
Each mode enables a different control structure.
Minimum mode operation and control signals are very similar to those of 8085.
So 8085 8-bit peripherals can be used with 8086 without special considerations.
Easy and least expensive way to build single processor systems
[attachment=54851]
8086 FEATURES
16-bit Arithmetic Logic Unit
16-bit data bus (8088 has 8-bit data bus)
20-bit address bus - 220 = 1,048,576 = 1 meg
The address refers to a byte in memory.
In the 8088, these bytes come in on the 8-bit data bus. In the 8086, bytes at even addresses come in on the low half of the data bus (bits 0-7) and bytes at odd addresses come in on the upper half of the data bus (bits 8-15).
The 8086 can read a 16-bit word at an even address in one operation and at an
odd address in two operations. The 8088 needs two operations in either case.
The least significant byte of a word on an 8086 family microprocessor is at the
lower address.
8086 ARCHITECTURE
The 8086 has two parts,
the Bus Interface Unit (BIU) and
the Execution Unit (EU).
The BIU fetches instructions, reads and writes data, and computes the 20-bit address.
The EU decodes and executes the instructions using the 16-bit ALU.
The BIU contains the following registers:
IP - the Instruction Pointer
CS - the Code Segment Register
DS - the Data Segment Register
SS - the Stack Segment Register
ES - the Extra Segment Register
The BIU fetches instructions using the CS and IP, written CS:IP, to contract
the 20-bit address. Data is fetched using a segment register (usually the DS)
and an effective address (EA) computed by the EU depending on the
addressing mode.
8086 maximum & minimum modes
8086 maximum & minimum modes
The mode is controlled by MN/MX.
Maximum mode is obtained by connecting MN/MX to low and minimum mode is by connecting it to high.
Having two different modes (minimum and maximum) is used only 8088/8086.
Each mode enables a different control structure.
Minimum mode operation and control signals are very similar to those of 8085.
So 8085 8-bit peripherals can be used with 8086 without special considerations.
Easy and least expensive way to build single processor systems