09-07-2013, 02:57 PM
Memristor Seminar
[attachment=56525]
INTRODUCTION
History
For nearly 150 years, the known fundamental passive circuit elements were limited to the capacitor (discovered in 1745), the resistor (1827), and the inductor (1831). Then, in a brilliant but underappreciated 1971 paper, Leon Chua, a professor of electrical engineering at the University of California, Berkeley, predicted the existence of a fourth fundamental device, which he called a memristor. He proved that memristor behavior could not be duplicated by any circuit built using only the other three elements, which is why the memristor is truly fundamental.
Memristor is a contraction of “memory resistor,” because that is exactly its function to remember its history. A memristor is a two-terminal device whose resistance depends on the magnitude and polarity of the voltage applied to it and the length of time that voltage has been applied. When you turn off the voltage, the memristor remembers it’s most recent resistance until the next time you turn it on, whether that happens a day later or a year later.
Chua discovered a missing link in the pair wise mathematical equations that relate the four circuit quantities-charge, current, voltage, and magnetic flux-to one another. These can be related in six ways. Two are connected through the basic physical laws of electricity and magnetism, and three are related by the known circuit elements: resistors connect voltage and current, inductors connect flux and current, and capacitors connect voltage and charge. But one equation is missing from this group: the relationship between charge moving through a circuit and the magnetic flux surrounded by that circuit.
Working
Fig 2.2.1
If a positive voltage is applied to the top electrode of the device, it will repel the (also positive)oxygen vacancies in the TiO2-xlayer down into the pure TiO2 layer. That turns the TiO2 layer into TiO2- x and makes it conductive, thus turning the device on. A negative voltage has the opposite effect: the vacancies are attracted upward and back out of the TiO2, and thus the thick- ness of the TiO2 layer increases and the device turns off.
The oxygen deficiencies in the TiO2-x manifest as “bubbles” of oxygen vacancies scattered throughout the upper layer. A positive voltage on the switch repels the (positive)oxygen deficiencies in the metallic upper TiO2- x layer, sending them into the insulating TiO2layer below. That causes the boundary between the two materials to move down, increasing the percentage of conducting TiO2- x and thus the conductivity of the entire switch. The more positive voltage is applied, the more conductive the cube becomes.
Bow Ties:
Leon Chua’s original graph of the hypothetical memristor’s behavior is shown at top right; the graph of R. Stanley William’s experimental results are shown below. The loops map the switching behavior of the device: it begins with a high resistance, and as the voltage increases, the current slowly increases. As charge flows through the device, the resistance drops, and the current increases more rapidly with increasing voltage until the maximum is reached. Then, as the voltage decreases, the current decreases but more slowly, because charge is flowing through the device and the resistance is still dropping. The result is an on-switching loop. When the voltage turns negative, the resistance of the device increases, resulting in an off-switching loop.
3 Other Types of Memristors
Spintronic Memristor
Concept of Spintronic memristor is given as, resistance is caused by the spin of electrons in one section of the device pointing in a different direction than those in another section, creating a "domain wall," a boundary between the two states. Electrons flowing into the device have a certain spin, which alters the magnetization state of the device. Changing the magnetization, in turn, moves the domain wall and changes the device's resistance.
Spin Torque Magnetoresistance
Spin Torque Transfer MRAM is a well-known device that exhibits memristive behavior. The resistance is dependent on the relative spin orientation between two sides of a magnetic tunnel junction. This in turn can be controlled by the spin torque induced by the current flowing through the junction.
However, the length of time the current flows through the junction determines the amount of current needed, i.e., the charge flowing through is the key variable. Additionally, MgO based magnetic tunnel junctions show memristive behavior based on the drift of oxygen vacancies within the insulating MgO layer (resistive switching). Therefore, the combination of spin transfer torque and resistive switching leads naturally to a second-order memristive system with w=(w1,w2) where w1 describes the magnetic state of the magnetic tunnel junction and w2 denotes the resistive state of the MgO barrier.
3-Terminal Memristor
Although the memristor is defined in terms of a 2-terminal circuit element, there was an implementation of a 3-terminal device called a memistor developed by Bernard Widrow in 1960.Memistors formed basic components of a neural network architecture called ADALINE developed by Widrow and Ted Hoff the memistor was described as follows:
Like the transistor, the memistor is a 3-terminal element. The conductance between two of the terminals is controlled by the time integral of the current in the third, rather than its instantaneous value as in the transistor.
Reproducible elements have been made which are continuously variable (thousands of possible analog storage levels), and which typically vary in resistance from 100 ohms to 1 ohm, and cover this range in about 10 seconds with several mille amperes of plating current.
Array Based Multilevel Memory of Memristor
The proposed method has the operating point of the memristor be maintained its desired location (or resistance value) utilizing a set of pre-determined multiple resistance levels. Fig.2.4.1 shows the basic idea of the proposed method, where the resistance array to be referenced and the memristor to be programmed (tuned) are shown.
The goal is to have the memristor keep any of the resistance level selected from the resistance array. If a predetermined magnitude of the current pulse Is (t) is applied to the resistance array, different levels of voltages V k will appear at each node of the resistance array. The same current pulse is (t) is also applied to the memristor.
FUTURE SCOPE
Combined with transistors in a hybrid chip, memristors could radically improve the performance of digital circuits without shrinking transistors. Using transistors more efficiently could in turn give us another decade, at least, of Moore’s Law performance improvement, without requiring the costly and increasingly difficult doublings of transistor density on chips. In the end, memristors might even become the cornerstone of new analog circuits that compute using architecture much like that of the brain. Memristors potential goes far beyond instant-on computers to embrace one of the grandest technology challenges: mimicking the functions of a brain. Within a decade, memristors could let us emulate, instead of merely simulate, networks of neurons and synapses. Many research groups have been working toward a brain in silico: IBM’s Blue Brain project, Howard Hughes Medical Institute’s Janelia Farm, and Harvard’s Center for Brain Science are just three. However, even a mouse brain simulation in real time involves solving an astronomical number of coupled partial differential equations. A digital computer capable of coping with this staggering workload would need to be the size of a small city, and powering it would require several dedicated nuclear power plants.
CONCLUSION
The reference resistance array-based multilevel memristor memory is proposed in this paper. The idea has been implemented with two circuits namely the write-in and the read-out circuits. Simulation of the write-in circuit shows that the memristors memorize the desired discrete resistance levels regardless of their characteristic differences. In read-out simulation, contents of the memristors move toward their original values from the deviated ones whenever the read-out processing is performed.
The proposed multilevel idea of the memristor together with its intrinsic feature of small size should make the memristor to be a powerful memory device. Also, if the number of multilevel of memory is increased, the memristor could be an ideal element for synaptic weight implementation since the synaptic multiplication can be performed simply by Ohm’s law
V=IR in the memristor.
Memristor is the fourth fundamental component. Thus the discovery of a brand new fundamental circuit element is something not to be taken lightly and has the potential to open the door to a brand new type of electronics. HP already has plans to implement memristors in a new type of non-volatile memory which could eventually replace flash and other memory systems.
[attachment=56525]
INTRODUCTION
History
For nearly 150 years, the known fundamental passive circuit elements were limited to the capacitor (discovered in 1745), the resistor (1827), and the inductor (1831). Then, in a brilliant but underappreciated 1971 paper, Leon Chua, a professor of electrical engineering at the University of California, Berkeley, predicted the existence of a fourth fundamental device, which he called a memristor. He proved that memristor behavior could not be duplicated by any circuit built using only the other three elements, which is why the memristor is truly fundamental.
Memristor is a contraction of “memory resistor,” because that is exactly its function to remember its history. A memristor is a two-terminal device whose resistance depends on the magnitude and polarity of the voltage applied to it and the length of time that voltage has been applied. When you turn off the voltage, the memristor remembers it’s most recent resistance until the next time you turn it on, whether that happens a day later or a year later.
Chua discovered a missing link in the pair wise mathematical equations that relate the four circuit quantities-charge, current, voltage, and magnetic flux-to one another. These can be related in six ways. Two are connected through the basic physical laws of electricity and magnetism, and three are related by the known circuit elements: resistors connect voltage and current, inductors connect flux and current, and capacitors connect voltage and charge. But one equation is missing from this group: the relationship between charge moving through a circuit and the magnetic flux surrounded by that circuit.
Working
Fig 2.2.1
If a positive voltage is applied to the top electrode of the device, it will repel the (also positive)oxygen vacancies in the TiO2-xlayer down into the pure TiO2 layer. That turns the TiO2 layer into TiO2- x and makes it conductive, thus turning the device on. A negative voltage has the opposite effect: the vacancies are attracted upward and back out of the TiO2, and thus the thick- ness of the TiO2 layer increases and the device turns off.
The oxygen deficiencies in the TiO2-x manifest as “bubbles” of oxygen vacancies scattered throughout the upper layer. A positive voltage on the switch repels the (positive)oxygen deficiencies in the metallic upper TiO2- x layer, sending them into the insulating TiO2layer below. That causes the boundary between the two materials to move down, increasing the percentage of conducting TiO2- x and thus the conductivity of the entire switch. The more positive voltage is applied, the more conductive the cube becomes.
Bow Ties:
Leon Chua’s original graph of the hypothetical memristor’s behavior is shown at top right; the graph of R. Stanley William’s experimental results are shown below. The loops map the switching behavior of the device: it begins with a high resistance, and as the voltage increases, the current slowly increases. As charge flows through the device, the resistance drops, and the current increases more rapidly with increasing voltage until the maximum is reached. Then, as the voltage decreases, the current decreases but more slowly, because charge is flowing through the device and the resistance is still dropping. The result is an on-switching loop. When the voltage turns negative, the resistance of the device increases, resulting in an off-switching loop.
3 Other Types of Memristors
Spintronic Memristor
Concept of Spintronic memristor is given as, resistance is caused by the spin of electrons in one section of the device pointing in a different direction than those in another section, creating a "domain wall," a boundary between the two states. Electrons flowing into the device have a certain spin, which alters the magnetization state of the device. Changing the magnetization, in turn, moves the domain wall and changes the device's resistance.
Spin Torque Magnetoresistance
Spin Torque Transfer MRAM is a well-known device that exhibits memristive behavior. The resistance is dependent on the relative spin orientation between two sides of a magnetic tunnel junction. This in turn can be controlled by the spin torque induced by the current flowing through the junction.
However, the length of time the current flows through the junction determines the amount of current needed, i.e., the charge flowing through is the key variable. Additionally, MgO based magnetic tunnel junctions show memristive behavior based on the drift of oxygen vacancies within the insulating MgO layer (resistive switching). Therefore, the combination of spin transfer torque and resistive switching leads naturally to a second-order memristive system with w=(w1,w2) where w1 describes the magnetic state of the magnetic tunnel junction and w2 denotes the resistive state of the MgO barrier.
3-Terminal Memristor
Although the memristor is defined in terms of a 2-terminal circuit element, there was an implementation of a 3-terminal device called a memistor developed by Bernard Widrow in 1960.Memistors formed basic components of a neural network architecture called ADALINE developed by Widrow and Ted Hoff the memistor was described as follows:
Like the transistor, the memistor is a 3-terminal element. The conductance between two of the terminals is controlled by the time integral of the current in the third, rather than its instantaneous value as in the transistor.
Reproducible elements have been made which are continuously variable (thousands of possible analog storage levels), and which typically vary in resistance from 100 ohms to 1 ohm, and cover this range in about 10 seconds with several mille amperes of plating current.
Array Based Multilevel Memory of Memristor
The proposed method has the operating point of the memristor be maintained its desired location (or resistance value) utilizing a set of pre-determined multiple resistance levels. Fig.2.4.1 shows the basic idea of the proposed method, where the resistance array to be referenced and the memristor to be programmed (tuned) are shown.
The goal is to have the memristor keep any of the resistance level selected from the resistance array. If a predetermined magnitude of the current pulse Is (t) is applied to the resistance array, different levels of voltages V k will appear at each node of the resistance array. The same current pulse is (t) is also applied to the memristor.
FUTURE SCOPE
Combined with transistors in a hybrid chip, memristors could radically improve the performance of digital circuits without shrinking transistors. Using transistors more efficiently could in turn give us another decade, at least, of Moore’s Law performance improvement, without requiring the costly and increasingly difficult doublings of transistor density on chips. In the end, memristors might even become the cornerstone of new analog circuits that compute using architecture much like that of the brain. Memristors potential goes far beyond instant-on computers to embrace one of the grandest technology challenges: mimicking the functions of a brain. Within a decade, memristors could let us emulate, instead of merely simulate, networks of neurons and synapses. Many research groups have been working toward a brain in silico: IBM’s Blue Brain project, Howard Hughes Medical Institute’s Janelia Farm, and Harvard’s Center for Brain Science are just three. However, even a mouse brain simulation in real time involves solving an astronomical number of coupled partial differential equations. A digital computer capable of coping with this staggering workload would need to be the size of a small city, and powering it would require several dedicated nuclear power plants.
CONCLUSION
The reference resistance array-based multilevel memristor memory is proposed in this paper. The idea has been implemented with two circuits namely the write-in and the read-out circuits. Simulation of the write-in circuit shows that the memristors memorize the desired discrete resistance levels regardless of their characteristic differences. In read-out simulation, contents of the memristors move toward their original values from the deviated ones whenever the read-out processing is performed.
The proposed multilevel idea of the memristor together with its intrinsic feature of small size should make the memristor to be a powerful memory device. Also, if the number of multilevel of memory is increased, the memristor could be an ideal element for synaptic weight implementation since the synaptic multiplication can be performed simply by Ohm’s law
V=IR in the memristor.
Memristor is the fourth fundamental component. Thus the discovery of a brand new fundamental circuit element is something not to be taken lightly and has the potential to open the door to a brand new type of electronics. HP already has plans to implement memristors in a new type of non-volatile memory which could eventually replace flash and other memory systems.