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Full Version: Basic Processor Architecture of 8085(µp)
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Basic Processor Architecture of 8085(µp)


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The architecture of 8085 consist various components like.
1:Register and accumulator.
2:ALU.
3:Instruction decoder and machine cycle encoder.
4:Address buffer.
5:Address/data buffer.
6:Inc/Dec latch.
7:Interrupt control.
8:Serial i/o like SOD,SID.
9:Timing and Control circuit.

Accumulator:

The accumulator is an 8-bit register then is part of the arithmetic/logic unit(ALU).
This register is used to store to store 8-bit data this data is used to perform arithmetic & logical operation.
The result of an operation is stored in the accumulator.
The accumulator is also identified as register A.
The accumulator is used for data transfer between an I/O port and memory location.

Registers

The 8085 simulator has six general-purpose registers to store 8-bit data; these are identified as B, C, D, E, H and L. They can be combined as register pair – BC, DE and HL – to perform some 16-bit operations.
The programmer can use these registers to store or copy data into the registers by using data copy instructions.
Out of these six registers, four 8-bit registers are scratch pad registers which are accessible to the programmer and hence can be used to store data during a program execution.
And the two registers H and L are similar to that of scratch pad register but they are utilized in indirect addressing mode. In this mode, the memory location i.e. the address is specified by the contents of the registers.

Program Counter (PC):

This 16-bit register deals with sequencing the execution of instructions. This register is a memory pointer. Memory locations have 16-bit addresses, and that is why this is a 16-bit register.
The microprocessor uses this register to sequence the execution of the instructions. The function of the program counter is to point to the memory address from which the next instruction is to be fetched. When a byte (machine code) is being fetched, the program counter is incremented by one to point to the next memory location.

Address/data buffer:

The address bus will be having 16 address lines[A15-A0] .In which A7-A0 are called as lower addressing lines and these are multiplexed with data lines[D7-D0] to form multiplexed address /data buffer .The address/data buffer is the bidirectional bus.

Timing and Control Unit:

The timing and control unit accepts information from the instruction decoder and
generates different control signal. This unit synchronizes all the microprocessor operation and generates control and status signal necessary for communication between the microprocessor and peripherals.