07-01-2014, 02:35 PM
28-Pin, 8-Bit CMOS FLASH Microcontroller with A/D Converter
[attachment=59724]
DEVICE OVERVIEW
This document contains device specific information for
the operation of the PIC16F72 device. Additional infor-
mation may be found in the PICmicroTM Mid-Range
MCU Reference Manual (DS33023), which may be
downloaded from the Microchip website. The Refer-
ence Manual should be considered a complementary
document to this data sheet, and is highly recom-
mended reading for a better understanding of the
device architecture and operation of the peripheral
modules.
MEMORY ORGANIZATION
There are two memory blocks in the PIC16F72 device.
These are the program memory and the data memory.
Each block has separate buses so that concurrent
access can occur. Program memory and data memory
are explained in this section. Program memory can be
read internally by the user code (see Section 4.0).
The data memory can further be broken down into the
general purpose RAM and the Special Function
Registers (SFRs). The operation of the SFRs that
control the “core” are described here. The SFRs used
to control the peripheral modules are described in the
section discussing each individual peripheral module.
Additional information on device memory may be found
in the PICmicroTM Mid-Range Reference Manual,
(DS33023).
PORTA and the TRISA Register
PORTA is a 6-bit wide, bi-directional port. The corre-
sponding data direction register is TRISA. Setting a
TRISA bit (= 1) will make the corresponding PORTA pin
an input (i.e., put the corresponding output driver in a
Hi-Impedance mode). Clearing a TRISA bit (= 0) will
make the corresponding PORTA pin an output (i.e., put
the contents of the output latch on the selected pin).
[attachment=59724]
DEVICE OVERVIEW
This document contains device specific information for
the operation of the PIC16F72 device. Additional infor-
mation may be found in the PICmicroTM Mid-Range
MCU Reference Manual (DS33023), which may be
downloaded from the Microchip website. The Refer-
ence Manual should be considered a complementary
document to this data sheet, and is highly recom-
mended reading for a better understanding of the
device architecture and operation of the peripheral
modules.
MEMORY ORGANIZATION
There are two memory blocks in the PIC16F72 device.
These are the program memory and the data memory.
Each block has separate buses so that concurrent
access can occur. Program memory and data memory
are explained in this section. Program memory can be
read internally by the user code (see Section 4.0).
The data memory can further be broken down into the
general purpose RAM and the Special Function
Registers (SFRs). The operation of the SFRs that
control the “core” are described here. The SFRs used
to control the peripheral modules are described in the
section discussing each individual peripheral module.
Additional information on device memory may be found
in the PICmicroTM Mid-Range Reference Manual,
(DS33023).
PORTA and the TRISA Register
PORTA is a 6-bit wide, bi-directional port. The corre-
sponding data direction register is TRISA. Setting a
TRISA bit (= 1) will make the corresponding PORTA pin
an input (i.e., put the corresponding output driver in a
Hi-Impedance mode). Clearing a TRISA bit (= 0) will
make the corresponding PORTA pin an output (i.e., put
the contents of the output latch on the selected pin).