12-03-2014, 03:47 PM
Why Semiconductors?
[attachment=60072]
Conductors always have a high concentration of electrons in conduction bands
states that are free to move through the material
Insulators always have virtually zero electrons in such bands
conduction band energy is too high
all the electrons are stuck in valance bands
localized to particular atoms/molecules in the material
Semiconductors have a conduction band whose electron population is easily manipulated
Sensitive to dopants, applied potentials, temperature
Electrons & Holes
At normal temperatures,
a small percentage of
shell-3 electrons will be
free of the bond orbitals
wandering thru the lattice…
leaving a “hole” in the lattice point they left
a hole acts like a positively charged particle
Once created, holes can “move,” too…
by a nearby electron hopping over to fill them
however, hole mobility is usually lower than that of electrons
[b]p-type vs. n-type Silicon[/b]
Pure silicon:
Has an equal number of positive & negative charge carriers (holes & electrons, resp.)
Acceptor-doped (e.g., boron-doped) silicon:
Has a charge-carrier concentration heavily dominated by positive charge carriers (holes, h+)
Balanced by negative, immobile ions of acceptor atom
We call it a “p-type” semiconductor.
Donor-doped (e.g., phosphorus-doped) silicon
Has charge-carrier concentration heavily dominated by negative charge carriers (electrons, e-)
Balanced by positive, immobile ions of donor atom
Call it “n-type” semiconductor
[b]Why Voltage Scaling?[/b]
For many years, logic voltages were maintained at fairly constant levels as transistors shrunk
TTL 5V logic – was standard for many years
later 3.3 V, now: ~1V within leading-edge CPUs
Further shrinkage w/o voltage scaling is no longer possible, due to various effects:
Punch-through
Device degradation from hot carriers
Gate-insulator failure
Carrier velocity saturation
In general, things break down at high field strengths
constant-field voltage scaling may be preferred
Long-term Temperature Scaling?
May be needed in the long term.
Sub-threshold power dissipation across “off” transistors is based on the leakage current density exp(−Vt / T)
Vt is the threshold voltage
Must scale down with Vdd, or else transistor can’t turn on!
T is the thermal voltage at temperature T
Equal to kBT/q, where q is electron charge magnitude
Voltage spread of individual electrons fr. thermal noise
As voltages decrease,
leakage power will dominate
devices will become unable to store charge
Unless (eventually),
Only alternative to low T: Scaling halts!
Probably what must happen, because low temps.
imply slow rate of quantum evolution.
[attachment=60072]
Conductors always have a high concentration of electrons in conduction bands
states that are free to move through the material
Insulators always have virtually zero electrons in such bands
conduction band energy is too high
all the electrons are stuck in valance bands
localized to particular atoms/molecules in the material
Semiconductors have a conduction band whose electron population is easily manipulated
Sensitive to dopants, applied potentials, temperature
Electrons & Holes
At normal temperatures,
a small percentage of
shell-3 electrons will be
free of the bond orbitals
wandering thru the lattice…
leaving a “hole” in the lattice point they left
a hole acts like a positively charged particle
Once created, holes can “move,” too…
by a nearby electron hopping over to fill them
however, hole mobility is usually lower than that of electrons
[b]p-type vs. n-type Silicon[/b]
Pure silicon:
Has an equal number of positive & negative charge carriers (holes & electrons, resp.)
Acceptor-doped (e.g., boron-doped) silicon:
Has a charge-carrier concentration heavily dominated by positive charge carriers (holes, h+)
Balanced by negative, immobile ions of acceptor atom
We call it a “p-type” semiconductor.
Donor-doped (e.g., phosphorus-doped) silicon
Has charge-carrier concentration heavily dominated by negative charge carriers (electrons, e-)
Balanced by positive, immobile ions of donor atom
Call it “n-type” semiconductor
[b]Why Voltage Scaling?[/b]
For many years, logic voltages were maintained at fairly constant levels as transistors shrunk
TTL 5V logic – was standard for many years
later 3.3 V, now: ~1V within leading-edge CPUs
Further shrinkage w/o voltage scaling is no longer possible, due to various effects:
Punch-through
Device degradation from hot carriers
Gate-insulator failure
Carrier velocity saturation
In general, things break down at high field strengths
constant-field voltage scaling may be preferred
Long-term Temperature Scaling?
May be needed in the long term.
Sub-threshold power dissipation across “off” transistors is based on the leakage current density exp(−Vt / T)
Vt is the threshold voltage
Must scale down with Vdd, or else transistor can’t turn on!
T is the thermal voltage at temperature T
Equal to kBT/q, where q is electron charge magnitude
Voltage spread of individual electrons fr. thermal noise
As voltages decrease,
leakage power will dominate
devices will become unable to store charge
Unless (eventually),
Only alternative to low T: Scaling halts!
Probably what must happen, because low temps.
imply slow rate of quantum evolution.